34 struct msm_mdss {  struct
52 					    struct msm_mdss *msm_mdss)  in msm_mdss_parse_data_bus_icc_path()  argument
62 	msm_mdss->mdp_path[0] = path0;  in msm_mdss_parse_data_bus_icc_path()
63 	msm_mdss->num_mdp_paths = 1;  in msm_mdss_parse_data_bus_icc_path()
67 		msm_mdss->mdp_path[1] = path1;  in msm_mdss_parse_data_bus_icc_path()
68 		msm_mdss->num_mdp_paths++;  in msm_mdss_parse_data_bus_icc_path()
73 		msm_mdss->reg_bus_path = reg_bus_path;  in msm_mdss_parse_data_bus_icc_path()
80 	struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);  in msm_mdss_irq()  local
86 	interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);  in msm_mdss_irq()
92 		rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,  in msm_mdss_irq()
95 			dev_err(msm_mdss->dev, "handle irq fail: irq=%lu rc=%d\n",  in msm_mdss_irq()
108 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_mask()  local
112 	clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_mask()
119 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_unmask()  local
123 	set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_unmask()
139 	struct msm_mdss *msm_mdss = domain->host_data;  in msm_mdss_irqdomain_map()  local
144 	return irq_set_chip_data(irq, msm_mdss);  in msm_mdss_irqdomain_map()
152 static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)  in _msm_mdss_irq_domain_add()  argument
157 	dev = msm_mdss->dev;  in _msm_mdss_irq_domain_add()
160 			&msm_mdss_irqdomain_ops, msm_mdss);  in _msm_mdss_irq_domain_add()
166 	msm_mdss->irq_controller.enabled_mask = 0;  in _msm_mdss_irq_domain_add()
167 	msm_mdss->irq_controller.domain = domain;  in _msm_mdss_irq_domain_add()
172 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_20()  argument
174 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_20()
176 	writel_relaxed(data->ubwc_static, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_20()
179 static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_30()  argument
181 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_30()
192 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_30()
195 static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_40()  argument
197 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_40()
203 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_40()
206 		writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
207 		writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
210 			writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
212 			writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
213 		writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
229 static const struct msm_mdss_data *msm_mdss_generate_mdp5_mdss_data(struct msm_mdss *mdss)  in msm_mdss_generate_mdp5_mdss_data()
262 	struct msm_mdss *mdss;  in msm_mdss_get_mdss_data()
279 static int msm_mdss_enable(struct msm_mdss *msm_mdss)  in msm_mdss_enable()  argument
288 	for (i = 0; i < msm_mdss->num_mdp_paths; i++)  in msm_mdss_enable()
289 		icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW));  in msm_mdss_enable()
291 	if (msm_mdss->mdss_data && msm_mdss->mdss_data->reg_bus_bw)  in msm_mdss_enable()
292 		icc_set_bw(msm_mdss->reg_bus_path, 0,  in msm_mdss_enable()
293 			   msm_mdss->mdss_data->reg_bus_bw);  in msm_mdss_enable()
295 		icc_set_bw(msm_mdss->reg_bus_path, 0,  in msm_mdss_enable()
298 	ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_enable()
300 		dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);  in msm_mdss_enable()
308 	if (msm_mdss->is_mdp5 || !msm_mdss->mdss_data)  in msm_mdss_enable()
318 	switch (msm_mdss->mdss_data->ubwc_dec_version) {  in msm_mdss_enable()
324 		msm_mdss_setup_ubwc_dec_20(msm_mdss);  in msm_mdss_enable()
327 		msm_mdss_setup_ubwc_dec_30(msm_mdss);  in msm_mdss_enable()
331 		msm_mdss_setup_ubwc_dec_40(msm_mdss);  in msm_mdss_enable()
334 		dev_err(msm_mdss->dev, "Unsupported UBWC decoder version %x\n",  in msm_mdss_enable()
335 			msm_mdss->mdss_data->ubwc_dec_version);  in msm_mdss_enable()
336 		dev_err(msm_mdss->dev, "HW_REV: 0x%x\n",  in msm_mdss_enable()
337 			readl_relaxed(msm_mdss->mmio + HW_REV));  in msm_mdss_enable()
338 		dev_err(msm_mdss->dev, "UBWC_DEC_HW_VERSION: 0x%x\n",  in msm_mdss_enable()
339 			readl_relaxed(msm_mdss->mmio + UBWC_DEC_HW_VERSION));  in msm_mdss_enable()
346 static int msm_mdss_disable(struct msm_mdss *msm_mdss)  in msm_mdss_disable()  argument
350 	clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_disable()
352 	for (i = 0; i < msm_mdss->num_mdp_paths; i++)  in msm_mdss_disable()
353 		icc_set_bw(msm_mdss->mdp_path[i], 0, 0);  in msm_mdss_disable()
355 	if (msm_mdss->reg_bus_path)  in msm_mdss_disable()
356 		icc_set_bw(msm_mdss->reg_bus_path, 0, 0);  in msm_mdss_disable()
361 static void msm_mdss_destroy(struct msm_mdss *msm_mdss)  in msm_mdss_destroy()  argument
363 	struct platform_device *pdev = to_platform_device(msm_mdss->dev);  in msm_mdss_destroy()
366 	pm_runtime_suspend(msm_mdss->dev);  in msm_mdss_destroy()
367 	pm_runtime_disable(msm_mdss->dev);  in msm_mdss_destroy()
368 	irq_domain_remove(msm_mdss->irq_controller.domain);  in msm_mdss_destroy()
369 	msm_mdss->irq_controller.domain = NULL;  in msm_mdss_destroy()
430 static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)  in msm_mdss_init()
432 	struct msm_mdss *msm_mdss;  in msm_mdss_init()  local
440 	msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);  in msm_mdss_init()
441 	if (!msm_mdss)  in msm_mdss_init()
444 	msm_mdss->mdss_data = of_device_get_match_data(&pdev->dev);  in msm_mdss_init()
446 	msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss");  in msm_mdss_init()
447 	if (IS_ERR(msm_mdss->mmio))  in msm_mdss_init()
448 		return ERR_CAST(msm_mdss->mmio);  in msm_mdss_init()
450 	dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio);  in msm_mdss_init()
452 	ret = msm_mdss_parse_data_bus_icc_path(&pdev->dev, msm_mdss);  in msm_mdss_init()
457 		ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);  in msm_mdss_init()
459 		ret = devm_clk_bulk_get_all(&pdev->dev, &msm_mdss->clocks);  in msm_mdss_init()
464 	msm_mdss->num_clocks = ret;  in msm_mdss_init()
465 	msm_mdss->is_mdp5 = is_mdp5;  in msm_mdss_init()
467 	msm_mdss->dev = &pdev->dev;  in msm_mdss_init()
473 	ret = _msm_mdss_irq_domain_add(msm_mdss);  in msm_mdss_init()
478 					 msm_mdss);  in msm_mdss_init()
482 	return msm_mdss;  in msm_mdss_init()
487 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_suspend()
496 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_resume()
527 	struct msm_mdss *mdss;  in mdss_probe()
556 	struct msm_mdss *mdss = platform_get_drvdata(pdev);  in mdss_remove()