103 static inline u32 pll_get_cpctrl(u64 frac_start, unsigned long ref_clk,  in pll_get_cpctrl()  argument
107 		return (11000000 / (ref_clk / 20));  in pll_get_cpctrl()
128 static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk,  in pll_get_integloop_gain()  argument
135 		base = (64 * ref_clk) / HDMI_DEFAULT_REF_CLOCK;  in pll_get_integloop_gain()
137 		base = (1022 * ref_clk) / 100;  in pll_get_integloop_gain()
144 static inline u32 pll_get_pll_cmp(u64 fdata, unsigned long ref_clk)  in pll_get_pll_cmp()  argument
147 	u32 divisor = ref_clk * 10;  in pll_get_pll_cmp()
157 static inline u64 pll_cmp_to_fdata(u32 pll_cmp, unsigned long ref_clk)  in pll_cmp_to_fdata()  argument
159 	u64 fdata = ((u64)pll_cmp) * ref_clk * 10;  in pll_cmp_to_fdata()
218 static int pll_calculate(unsigned long pix_clk, unsigned long ref_clk,  in pll_calculate()  argument
249 	pll_divisor = 4 * ref_clk;  in pll_calculate()
259 	cpctrl = pll_get_cpctrl(frac_start, ref_clk, false);  in pll_calculate()
263 						ref_clk, false);  in pll_calculate()
268 	pll_cmp = pll_get_pll_cmp(fdata, ref_clk);  in pll_calculate()