11 		struct msm_dsi_dphy_timing *timing)  in dsi_20nm_dphy_set_timing()  argument
15 	writel(DSI_20nm_PHY_TIMING_CTRL_0_CLK_ZERO(timing->clk_zero),  in dsi_20nm_dphy_set_timing()
17 	writel(DSI_20nm_PHY_TIMING_CTRL_1_CLK_TRAIL(timing->clk_trail),  in dsi_20nm_dphy_set_timing()
19 	writel(DSI_20nm_PHY_TIMING_CTRL_2_CLK_PREPARE(timing->clk_prepare),  in dsi_20nm_dphy_set_timing()
21 	if (timing->clk_zero & BIT(8))  in dsi_20nm_dphy_set_timing()
24 	writel(DSI_20nm_PHY_TIMING_CTRL_4_HS_EXIT(timing->hs_exit),  in dsi_20nm_dphy_set_timing()
26 	writel(DSI_20nm_PHY_TIMING_CTRL_5_HS_ZERO(timing->hs_zero),  in dsi_20nm_dphy_set_timing()
28 	writel(DSI_20nm_PHY_TIMING_CTRL_6_HS_PREPARE(timing->hs_prepare),  in dsi_20nm_dphy_set_timing()
30 	writel(DSI_20nm_PHY_TIMING_CTRL_7_HS_TRAIL(timing->hs_trail),  in dsi_20nm_dphy_set_timing()
32 	writel(DSI_20nm_PHY_TIMING_CTRL_8_HS_RQST(timing->hs_rqst),  in dsi_20nm_dphy_set_timing()
34 	writel(DSI_20nm_PHY_TIMING_CTRL_9_TA_GO(timing->ta_go) |  in dsi_20nm_dphy_set_timing()
35 	       DSI_20nm_PHY_TIMING_CTRL_9_TA_SURE(timing->ta_sure),  in dsi_20nm_dphy_set_timing()
37 	writel(DSI_20nm_PHY_TIMING_CTRL_10_TA_GET(timing->ta_get),  in dsi_20nm_dphy_set_timing()
70 	struct msm_dsi_dphy_timing *timing = &phy->timing;  in dsi_20nm_phy_enable()  local
78 	if (msm_dsi_dphy_timing_calc(timing, clk_req)) {  in dsi_20nm_phy_enable()
80 			"%s: D-PHY timing calculation failed\n", __func__);  in dsi_20nm_phy_enable()
112 	dsi_20nm_dphy_set_timing(phy, timing);  in dsi_20nm_phy_enable()