183 static inline u32 dsi_read(struct msm_dsi_host *msm_host, u32 reg)  in dsi_read()  function
667 	intr = dsi_read(msm_host, REG_DSI_INTR_CTRL);  in dsi_intr_ctrl()
774 			data = dsi_read(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2);  in dsi_ctrl_enable()
832 		lane_ctrl = dsi_read(msm_host, REG_DSI_LANE_CTRL);  in dsi_ctrl_enable()
894 		reg_ctrl = dsi_read(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL);  in dsi_update_dsc_timing()
895 		reg_ctrl2 = dsi_read(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2);  in dsi_update_dsc_timing()
1047 	ctrl = dsi_read(msm_host, REG_DSI_CTRL);  in dsi_sw_reset()
1078 	dsi_ctrl = dsi_read(msm_host, REG_DSI_CTRL);  in dsi_op_mode_config()
1102 	data = dsi_read(msm_host, REG_DSI_CMD_DMA_CTRL);  in dsi_set_tx_power_mode()
1137 	data = dsi_read(msm_host, REG_DSI_STATUS0);  in dsi_wait4video_eng_busy()
1423 		data = dsi_read(msm_host, REG_DSI_RDBK_DATA(i));  in dsi_cmd_dma_rx()
1498 	status = dsi_read(msm_host, REG_DSI_ACK_ERR_STATUS);  in dsi_ack_err_status()
1512 	status = dsi_read(msm_host, REG_DSI_TIMEOUT_STATUS);  in dsi_timeout_status()
1524 	status = dsi_read(msm_host, REG_DSI_DLN0_PHY_ERR);  in dsi_dln0_phy_err()
1540 	status = dsi_read(msm_host, REG_DSI_FIFO_STATUS);  in dsi_fifo_status()
1556 	status = dsi_read(msm_host, REG_DSI_STATUS0);  in dsi_status()
1569 	status = dsi_read(msm_host, REG_DSI_CLK_STATUS);  in dsi_clk_status()
1602 	isr = dsi_read(msm_host, REG_DSI_INTR_CTRL);  in dsi_host_irq()
2067 	msm_host->dma_cmd_ctrl_restore = dsi_read(msm_host, REG_DSI_CTRL);  in msm_dsi_host_xfer_prepare()
2528 	reg = dsi_read(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL);  in msm_dsi_host_video_test_pattern_setup()
2549 	reg = dsi_read(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL);  in msm_dsi_host_cmd_test_pattern_setup()
2575 	reg = dsi_read(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL);  in msm_dsi_host_test_pattern_en()