Lines Matching +full:config +full:- +full:cond
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 The Linux Foundation. All rights reserved.
29 struct msm_drm_private *priv = plane->dev->dev_private; in get_kms()
30 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
35 return state->visible; in plane_enabled()
56 if (plane->type == DRM_PLANE_TYPE_PRIMARY) in mdp5_plane_install_properties()
68 struct mdp5_kms *mdp5_kms = get_kms(state->plane); in mdp5_plane_atomic_print_state()
70 drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ? in mdp5_plane_atomic_print_state()
71 pstate->hwpipe->name : "(null)"); in mdp5_plane_atomic_print_state()
72 if (mdp5_kms->caps & MDP_CAP_SRC_SPLIT) in mdp5_plane_atomic_print_state()
73 drm_printf(p, "\tright-hwpipe=%s\n", in mdp5_plane_atomic_print_state()
74 pstate->r_hwpipe ? pstate->r_hwpipe->name : in mdp5_plane_atomic_print_state()
76 drm_printf(p, "\tblend_mode=%u\n", pstate->base.pixel_blend_mode); in mdp5_plane_atomic_print_state()
77 drm_printf(p, "\tzpos=%u\n", pstate->base.zpos); in mdp5_plane_atomic_print_state()
78 drm_printf(p, "\tnormalized_zpos=%u\n", pstate->base.normalized_zpos); in mdp5_plane_atomic_print_state()
79 drm_printf(p, "\talpha=%u\n", pstate->base.alpha); in mdp5_plane_atomic_print_state()
80 drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage)); in mdp5_plane_atomic_print_state()
87 if (plane->state) in mdp5_plane_reset()
88 __drm_atomic_helper_plane_destroy_state(plane->state); in mdp5_plane_reset()
90 kfree(to_mdp5_plane_state(plane->state)); in mdp5_plane_reset()
91 plane->state = NULL; in mdp5_plane_reset()
95 __drm_atomic_helper_plane_reset(plane, &mdp5_state->base); in mdp5_plane_reset()
103 if (WARN_ON(!plane->state)) in mdp5_plane_duplicate_state()
106 mdp5_state = kmemdup(to_mdp5_plane_state(plane->state), in mdp5_plane_duplicate_state()
111 __drm_atomic_helper_plane_duplicate_state(plane, &mdp5_state->base); in mdp5_plane_duplicate_state()
113 return &mdp5_state->base; in mdp5_plane_duplicate_state()
138 struct msm_drm_private *priv = plane->dev->dev_private; in mdp5_plane_prepare_fb()
139 struct msm_kms *kms = priv->kms; in mdp5_plane_prepare_fb()
140 bool needs_dirtyfb = to_mdp5_plane_state(new_state)->needs_dirtyfb; in mdp5_plane_prepare_fb()
142 if (!new_state->fb) in mdp5_plane_prepare_fb()
147 return msm_framebuffer_prepare(new_state->fb, kms->aspace, needs_dirtyfb); in mdp5_plane_prepare_fb()
154 struct msm_kms *kms = &mdp5_kms->base.base; in mdp5_plane_cleanup_fb()
155 struct drm_framebuffer *fb = old_state->fb; in mdp5_plane_cleanup_fb()
156 bool needed_dirtyfb = to_mdp5_plane_state(old_state)->needs_dirtyfb; in mdp5_plane_cleanup_fb()
161 DBG("%s: cleanup: FB[%u]", plane->name, fb->base.id); in mdp5_plane_cleanup_fb()
162 msm_framebuffer_cleanup(fb, kms->aspace, needed_dirtyfb); in mdp5_plane_cleanup_fb()
169 struct drm_plane *plane = state->plane; in mdp5_plane_atomic_check_with_state()
170 struct drm_plane_state *old_state = plane->state; in mdp5_plane_atomic_check_with_state()
171 struct mdp5_cfg *config = mdp5_cfg_get_config(get_kms(plane)->cfg); in mdp5_plane_atomic_check_with_state() local
180 DBG("%s: check (%d -> %d)", plane->name, in mdp5_plane_atomic_check_with_state()
183 max_width = config->hw->lm.max_width << 16; in mdp5_plane_atomic_check_with_state()
184 max_height = config->hw->lm.max_height << 16; in mdp5_plane_atomic_check_with_state()
187 if (state->src_h > max_height) in mdp5_plane_atomic_check_with_state()
190 if (state->src_w > max_width) { in mdp5_plane_atomic_check_with_state()
196 if (config->hw->mdp.caps & MDP_CAP_SRC_SPLIT && in mdp5_plane_atomic_check_with_state()
197 (state->src_w <= 2 * max_width)) in mdp5_plane_atomic_check_with_state()
207 return -ERANGE; in mdp5_plane_atomic_check_with_state()
225 format = msm_framebuffer_format(state->fb); in mdp5_plane_atomic_check_with_state()
229 if (((state->src_w >> 16) != state->crtc_w) || in mdp5_plane_atomic_check_with_state()
230 ((state->src_h >> 16) != state->crtc_h)) in mdp5_plane_atomic_check_with_state()
233 rotation = drm_rotation_simplify(state->rotation, in mdp5_plane_atomic_check_with_state()
244 if (plane->type == DRM_PLANE_TYPE_CURSOR) in mdp5_plane_atomic_check_with_state()
247 /* (re)allocate hw pipe if we don't have one or caps-mismatch: */ in mdp5_plane_atomic_check_with_state()
248 if (!mdp5_state->hwpipe || (caps & ~mdp5_state->hwpipe->caps)) in mdp5_plane_atomic_check_with_state()
256 if ((need_right_hwpipe && !mdp5_state->r_hwpipe) || in mdp5_plane_atomic_check_with_state()
257 (!need_right_hwpipe && mdp5_state->r_hwpipe)) in mdp5_plane_atomic_check_with_state()
260 if (mdp5_kms->smp) { in mdp5_plane_atomic_check_with_state()
262 msm_framebuffer_format(state->fb); in mdp5_plane_atomic_check_with_state()
264 blkcfg = mdp5_smp_calculate(mdp5_kms->smp, format, in mdp5_plane_atomic_check_with_state()
265 state->src_w >> 16, false); in mdp5_plane_atomic_check_with_state()
267 if (mdp5_state->hwpipe && (mdp5_state->hwpipe->blkcfg != blkcfg)) in mdp5_plane_atomic_check_with_state()
273 /* TODO maybe we want to re-assign hwpipe sometimes in mdp5_plane_atomic_check_with_state()
274 * in cases when we no-longer need some caps to make in mdp5_plane_atomic_check_with_state()
277 struct mdp5_hw_pipe *old_hwpipe = mdp5_state->hwpipe; in mdp5_plane_atomic_check_with_state()
279 mdp5_state->r_hwpipe; in mdp5_plane_atomic_check_with_state()
283 ret = mdp5_pipe_assign(state->state, plane, caps, in mdp5_plane_atomic_check_with_state()
289 plane->name); in mdp5_plane_atomic_check_with_state()
293 mdp5_state->hwpipe = new_hwpipe; in mdp5_plane_atomic_check_with_state()
295 mdp5_state->r_hwpipe = new_right_hwpipe; in mdp5_plane_atomic_check_with_state()
302 mdp5_state->r_hwpipe = NULL; in mdp5_plane_atomic_check_with_state()
305 ret = mdp5_pipe_release(state->state, old_hwpipe); in mdp5_plane_atomic_check_with_state()
309 ret = mdp5_pipe_release(state->state, old_right_hwpipe); in mdp5_plane_atomic_check_with_state()
315 ret = mdp5_pipe_release(state->state, mdp5_state->hwpipe); in mdp5_plane_atomic_check_with_state()
319 ret = mdp5_pipe_release(state->state, mdp5_state->r_hwpipe); in mdp5_plane_atomic_check_with_state()
323 mdp5_state->hwpipe = mdp5_state->r_hwpipe = NULL; in mdp5_plane_atomic_check_with_state()
339 crtc = new_plane_state->crtc ? new_plane_state->crtc : old_plane_state->crtc; in mdp5_plane_atomic_check()
346 return -EINVAL; in mdp5_plane_atomic_check()
357 DBG("%s: update", plane->name); in mdp5_plane_atomic_update()
363 new_state->crtc, new_state->fb, in mdp5_plane_atomic_update()
364 &new_state->src, &new_state->dst); in mdp5_plane_atomic_update()
381 new_plane_state->crtc); in mdp5_plane_atomic_async_check()
383 return -EINVAL; in mdp5_plane_atomic_async_check()
385 if (!crtc_state->active) in mdp5_plane_atomic_async_check()
386 return -EINVAL; in mdp5_plane_atomic_async_check()
389 if (!mdp5_state->hwpipe) in mdp5_plane_atomic_async_check()
390 return -EINVAL; in mdp5_plane_atomic_async_check()
393 if (plane->state->crtc != new_plane_state->crtc || in mdp5_plane_atomic_async_check()
394 plane->state->src_w != new_plane_state->src_w || in mdp5_plane_atomic_async_check()
395 plane->state->src_h != new_plane_state->src_h || in mdp5_plane_atomic_async_check()
396 plane->state->crtc_w != new_plane_state->crtc_w || in mdp5_plane_atomic_async_check()
397 plane->state->crtc_h != new_plane_state->crtc_h || in mdp5_plane_atomic_async_check()
398 !plane->state->fb || in mdp5_plane_atomic_async_check()
399 plane->state->fb != new_plane_state->fb) in mdp5_plane_atomic_async_check()
400 return -EINVAL; in mdp5_plane_atomic_async_check()
418 if (new_plane_state->visible != plane->state->visible) in mdp5_plane_atomic_async_check()
419 return -EINVAL; in mdp5_plane_atomic_async_check()
429 struct drm_framebuffer *old_fb = plane->state->fb; in mdp5_plane_atomic_async_update()
431 plane->state->src_x = new_state->src_x; in mdp5_plane_atomic_async_update()
432 plane->state->src_y = new_state->src_y; in mdp5_plane_atomic_async_update()
433 plane->state->crtc_x = new_state->crtc_x; in mdp5_plane_atomic_async_update()
434 plane->state->crtc_y = new_state->crtc_y; in mdp5_plane_atomic_async_update()
439 mdp5_crtc_get_pipeline(new_state->crtc); in mdp5_plane_atomic_async_update()
442 ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb, in mdp5_plane_atomic_async_update()
443 &new_state->src, &new_state->dst); in mdp5_plane_atomic_async_update()
446 ctl = mdp5_crtc_get_ctl(new_state->crtc); in mdp5_plane_atomic_async_update()
451 *to_mdp5_plane_state(plane->state) = in mdp5_plane_atomic_async_update()
454 new_state->fb = old_fb; in mdp5_plane_atomic_async_update()
470 struct msm_kms *kms = &mdp5_kms->base.base; in set_scanout_locked()
473 MDP5_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) | in set_scanout_locked()
474 MDP5_PIPE_SRC_STRIDE_A_P1(fb->pitches[1])); in set_scanout_locked()
477 MDP5_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) | in set_scanout_locked()
478 MDP5_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); in set_scanout_locked()
481 msm_framebuffer_iova(fb, kms->aspace, 0)); in set_scanout_locked()
483 msm_framebuffer_iova(fb, kms->aspace, 1)); in set_scanout_locked()
485 msm_framebuffer_iova(fb, kms->aspace, 2)); in set_scanout_locked()
487 msm_framebuffer_iova(fb, kms->aspace, 3)); in set_scanout_locked()
490 /* Note: mdp5_plane->pipe_lock must be locked */
499 /* Note: mdp5_plane->pipe_lock must be locked */
509 if ((csc->type == CSC_YUV2RGB) || (CSC_YUV2YUV == csc->type)) in csc_enable()
511 if ((csc->type == CSC_RGB2YUV) || (CSC_YUV2YUV == csc->type)) in csc_enable()
516 matrix = csc->matrix; in csc_enable()
532 for (i = 0; i < ARRAY_SIZE(csc->pre_bias); i++) { in csc_enable()
533 uint32_t *pre_clamp = csc->pre_clamp; in csc_enable()
534 uint32_t *post_clamp = csc->post_clamp; in csc_enable()
545 MDP5_PIPE_CSC_1_PRE_BIAS_REG_VALUE(csc->pre_bias[i])); in csc_enable()
548 MDP5_PIPE_CSC_1_POST_BIAS_REG_VALUE(csc->post_bias[i])); in csc_enable()
553 #define DOWN_SCALE_RATIO_MAX 32 /* 2^(26-21) */
560 return -EINVAL; in calc_phase_step()
564 * where 2^21 represents the unity "1" in fixed-point hardware design. in calc_phase_step()
566 * -> maximum downscale ratio = 0b1_1111 = 31 in calc_phase_step()
569 return -EOVERFLOW; in calc_phase_step()
583 struct device *dev = mdp5_kms->dev->dev; in calc_scalex_steps()
589 DRM_DEV_ERROR(dev, "X scaling (%d->%d) failed: %d\n", src, dest, ret); in calc_scalex_steps()
595 phasex_steps[COMP_1_2] = phasex_step / info->hsub; in calc_scalex_steps()
606 struct device *dev = mdp5_kms->dev->dev; in calc_scaley_steps()
612 DRM_DEV_ERROR(dev, "Y scaling (%d->%d) failed: %d\n", src, dest, ret); in calc_scaley_steps()
618 phasey_steps[COMP_1_2] = phasey_step / info->vsub; in calc_scaley_steps()
626 const struct drm_format_info *info = drm_format_info(format->pixel_format); in get_scale_config()
636 sub = horz ? info->hsub : info->vsub; in get_scale_config()
646 COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEX_FILTER_COMP_1_2(uv_filter)); in get_scale_config()
651 COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEY_FILTER_COMP_1_2(uv_filter)); in get_scale_config()
681 const struct drm_format_info *info = drm_format_info(format->pixel_format); in mdp5_write_pixel_ext()
690 roi_w /= info->hsub; in mdp5_write_pixel_ext()
691 roi_h /= info->vsub; in mdp5_write_pixel_ext()
720 DBG("comp-%d (L/R): rpt=%d/%d, ovf=%d/%d, req=%d", i, in mdp5_write_pixel_ext()
727 DBG("comp-%d (T/B): rpt=%d/%d, ovf=%d/%d, req=%d", i, in mdp5_write_pixel_ext()
761 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_hwpipe_mode_set()
762 bool has_pe = hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT; in mdp5_hwpipe_mode_set()
787 MDP5_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) | in mdp5_hwpipe_mode_set()
788 MDP5_PIPE_SRC_FORMAT_R_BPC(format->bpc_r_cr) | in mdp5_hwpipe_mode_set()
789 MDP5_PIPE_SRC_FORMAT_G_BPC(format->bpc_g_y) | in mdp5_hwpipe_mode_set()
790 MDP5_PIPE_SRC_FORMAT_B_BPC(format->bpc_b_cb) | in mdp5_hwpipe_mode_set()
791 COND(format->alpha_enable, MDP5_PIPE_SRC_FORMAT_ALPHA_ENABLE) | in mdp5_hwpipe_mode_set()
792 MDP5_PIPE_SRC_FORMAT_CPP(format->bpp - 1) | in mdp5_hwpipe_mode_set()
793 MDP5_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) | in mdp5_hwpipe_mode_set()
794 COND(format->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT, in mdp5_hwpipe_mode_set()
796 MDP5_PIPE_SRC_FORMAT_FETCH_TYPE(format->fetch_type) | in mdp5_hwpipe_mode_set()
797 MDP5_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample)); in mdp5_hwpipe_mode_set()
800 MDP5_PIPE_SRC_UNPACK_ELEM0(format->element[0]) | in mdp5_hwpipe_mode_set()
801 MDP5_PIPE_SRC_UNPACK_ELEM1(format->element[1]) | in mdp5_hwpipe_mode_set()
802 MDP5_PIPE_SRC_UNPACK_ELEM2(format->element[2]) | in mdp5_hwpipe_mode_set()
803 MDP5_PIPE_SRC_UNPACK_ELEM3(format->element[3])); in mdp5_hwpipe_mode_set()
808 COND(has_pe, MDP5_PIPE_SRC_OP_MODE_SW_PIX_EXT_OVERRIDE) | in mdp5_hwpipe_mode_set()
814 if (hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT) in mdp5_hwpipe_mode_set()
816 src_w, pe->left, pe->right, in mdp5_hwpipe_mode_set()
817 src_h, pe->top, pe->bottom); in mdp5_hwpipe_mode_set()
819 if (hwpipe->caps & MDP_PIPE_CAP_SCALE) { in mdp5_hwpipe_mode_set()
821 step->x[COMP_0]); in mdp5_hwpipe_mode_set()
823 step->y[COMP_0]); in mdp5_hwpipe_mode_set()
825 step->x[COMP_1_2]); in mdp5_hwpipe_mode_set()
827 step->y[COMP_1_2]); in mdp5_hwpipe_mode_set()
835 if (hwpipe->caps & MDP_PIPE_CAP_CSC) { in mdp5_hwpipe_mode_set()
850 struct drm_plane_state *pstate = plane->state; in mdp5_plane_mode_set()
851 struct mdp5_hw_pipe *hwpipe = to_mdp5_plane_state(pstate)->hwpipe; in mdp5_plane_mode_set()
853 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_plane_mode_set()
856 uint32_t nplanes, config = 0; in mdp5_plane_mode_set() local
870 nplanes = fb->format->num_planes; in mdp5_plane_mode_set()
874 return -EINVAL; in mdp5_plane_mode_set()
877 pix_format = format->pixel_format; in mdp5_plane_mode_set()
879 src_x = src->x1; in mdp5_plane_mode_set()
880 src_y = src->y1; in mdp5_plane_mode_set()
884 crtc_x = dest->x1; in mdp5_plane_mode_set()
885 crtc_y = dest->y1; in mdp5_plane_mode_set()
895 src_img_w = min(fb->width, src_w); in mdp5_plane_mode_set()
896 src_img_h = min(fb->height, src_h); in mdp5_plane_mode_set()
898 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", plane->name, in mdp5_plane_mode_set()
899 fb->base.id, src_x, src_y, src_w, src_h, in mdp5_plane_mode_set()
900 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); in mdp5_plane_mode_set()
902 right_hwpipe = to_mdp5_plane_state(pstate)->r_hwpipe; in mdp5_plane_mode_set()
922 if (hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT) { in mdp5_plane_mode_set()
931 /* SCALE is used to both scale and up-sample chroma components */ in mdp5_plane_mode_set()
932 config |= get_scale_config(format, src_w, crtc_w, true); in mdp5_plane_mode_set()
933 config |= get_scale_config(format, src_h, crtc_h, false); in mdp5_plane_mode_set()
934 DBG("scale config = %x", config); in mdp5_plane_mode_set()
936 rotation = drm_rotation_simplify(pstate->rotation, in mdp5_plane_mode_set()
944 config, hdecm, vdecm, hflip, vflip, in mdp5_plane_mode_set()
950 config, hdecm, vdecm, hflip, vflip, in mdp5_plane_mode_set()
964 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); in mdp5_plane_pipe()
966 if (WARN_ON(!pstate->hwpipe)) in mdp5_plane_pipe()
969 return pstate->hwpipe->pipe; in mdp5_plane_pipe()
974 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); in mdp5_plane_right_pipe()
976 if (!pstate->r_hwpipe) in mdp5_plane_right_pipe()
979 return pstate->r_hwpipe->pipe; in mdp5_plane_right_pipe()
984 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); in mdp5_plane_get_flush()
987 if (WARN_ON(!pstate->hwpipe)) in mdp5_plane_get_flush()
990 mask = pstate->hwpipe->flush_mask; in mdp5_plane_get_flush()
992 if (pstate->r_hwpipe) in mdp5_plane_get_flush()
993 mask |= pstate->r_hwpipe->flush_mask; in mdp5_plane_get_flush()
1038 plane = &mdp5_plane->base; in mdp5_plane_init()
1042 mdp5_plane_install_properties(plane, &plane->base); in mdp5_plane_init()