119 	struct dpu_sw_pipe_cfg *pipe_cfg)  in _dpu_plane_calc_bw()  argument
129 	src_width = drm_rect_width(&pipe_cfg->src_rect);  in _dpu_plane_calc_bw()
130 	src_height = drm_rect_height(&pipe_cfg->src_rect);  in _dpu_plane_calc_bw()
131 	dst_height = drm_rect_height(&pipe_cfg->dst_rect);  in _dpu_plane_calc_bw()
166 		struct dpu_sw_pipe_cfg *pipe_cfg)  in _dpu_plane_calc_clk()  argument
171 	src_height = drm_rect_height(&pipe_cfg->src_rect);  in _dpu_plane_calc_clk()
172 	dst_width = drm_rect_width(&pipe_cfg->dst_rect);  in _dpu_plane_calc_clk()
173 	dst_height = drm_rect_height(&pipe_cfg->dst_rect);  in _dpu_plane_calc_clk()
255 		const struct msm_format *fmt, struct dpu_sw_pipe_cfg *pipe_cfg)  in _dpu_plane_set_qos_lut()  argument
271 				drm_rect_width(&pipe_cfg->src_rect));  in _dpu_plane_set_qos_lut()
362 		struct dpu_sw_pipe_cfg *pipe_cfg,  in _dpu_plane_set_ot_limit()  argument
373 	ot_params.width = drm_rect_width(&pipe_cfg->src_rect);  in _dpu_plane_set_ot_limit()
374 	ot_params.height = drm_rect_height(&pipe_cfg->src_rect);  in _dpu_plane_set_ot_limit()
531 		struct dpu_sw_pipe_cfg *pipe_cfg,  in _dpu_plane_setup_scaler()  argument
538 	u32 src_width = drm_rect_width(&pipe_cfg->src_rect);  in _dpu_plane_setup_scaler()
539 	u32 src_height = drm_rect_height(&pipe_cfg->src_rect);  in _dpu_plane_setup_scaler()
540 	u32 dst_width = drm_rect_width(&pipe_cfg->dst_rect);  in _dpu_plane_setup_scaler()
541 	u32 dst_height = drm_rect_height(&pipe_cfg->dst_rect);  in _dpu_plane_setup_scaler()
583 	struct dpu_sw_pipe_cfg pipe_cfg;  in _dpu_plane_color_fill_pipe()  local
592 	pipe_cfg.dst_rect = *dst_rect;  in _dpu_plane_color_fill_pipe()
594 	pipe_cfg.src_rect.x1 = 0;  in _dpu_plane_color_fill_pipe()
595 	pipe_cfg.src_rect.y1 = 0;  in _dpu_plane_color_fill_pipe()
596 	pipe_cfg.src_rect.x2 =  in _dpu_plane_color_fill_pipe()
597 		drm_rect_width(&pipe_cfg.dst_rect);  in _dpu_plane_color_fill_pipe()
598 	pipe_cfg.src_rect.y2 =  in _dpu_plane_color_fill_pipe()
599 		drm_rect_height(&pipe_cfg.dst_rect);  in _dpu_plane_color_fill_pipe()
605 		pipe->sspp->ops.setup_rects(pipe, &pipe_cfg);  in _dpu_plane_color_fill_pipe()
607 	_dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg, pstate->rotation);  in _dpu_plane_color_fill_pipe()
637 	_dpu_plane_color_fill_pipe(pstate, &pstate->pipe, &pstate->pipe_cfg.dst_rect,  in _dpu_plane_color_fill()
740 		struct dpu_sw_pipe_cfg *pipe_cfg,  in dpu_plane_atomic_check_pipe()  argument
757 	if (drm_rect_width(&pipe_cfg->src_rect) < min_src_size ||  in dpu_plane_atomic_check_pipe()
758 	    drm_rect_height(&pipe_cfg->src_rect) < min_src_size) {  in dpu_plane_atomic_check_pipe()
760 				DRM_RECT_ARG(&pipe_cfg->src_rect));  in dpu_plane_atomic_check_pipe()
766 	    (pipe_cfg->src_rect.x1 & 0x1 ||  in dpu_plane_atomic_check_pipe()
767 	     pipe_cfg->src_rect.y1 & 0x1 ||  in dpu_plane_atomic_check_pipe()
768 	     drm_rect_width(&pipe_cfg->src_rect) & 0x1 ||  in dpu_plane_atomic_check_pipe()
769 	     drm_rect_height(&pipe_cfg->src_rect) & 0x1)) {  in dpu_plane_atomic_check_pipe()
771 				DRM_RECT_ARG(&pipe_cfg->src_rect));  in dpu_plane_atomic_check_pipe()
776 	if (drm_rect_width(&pipe_cfg->dst_rect) < 0x1 ||  in dpu_plane_atomic_check_pipe()
777 	    drm_rect_height(&pipe_cfg->dst_rect) < 0x1) {  in dpu_plane_atomic_check_pipe()
779 				DRM_RECT_ARG(&pipe_cfg->dst_rect));  in dpu_plane_atomic_check_pipe()
784 	if (_dpu_plane_calc_clk(mode, pipe_cfg) > kms->perf.max_core_clk_rate) {  in dpu_plane_atomic_check_pipe()
806 	struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg;  in dpu_plane_atomic_check()  local
844 	pipe_cfg->src_rect = new_plane_state->src;  in dpu_plane_atomic_check()
847 	pipe_cfg->src_rect.x1 >>= 16;  in dpu_plane_atomic_check()
848 	pipe_cfg->src_rect.x2 >>= 16;  in dpu_plane_atomic_check()
849 	pipe_cfg->src_rect.y1 >>= 16;  in dpu_plane_atomic_check()
850 	pipe_cfg->src_rect.y2 >>= 16;  in dpu_plane_atomic_check()
852 	pipe_cfg->dst_rect = new_plane_state->dst;  in dpu_plane_atomic_check()
869 	drm_rect_rotate(&pipe_cfg->src_rect,  in dpu_plane_atomic_check()
873 	if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||  in dpu_plane_atomic_check()
874 	     _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {  in dpu_plane_atomic_check()
882 		    drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) {  in dpu_plane_atomic_check()
884 					DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);  in dpu_plane_atomic_check()
888 		if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {  in dpu_plane_atomic_check()
890 					DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);  in dpu_plane_atomic_check()
894 		if (drm_rect_width(&pipe_cfg->src_rect) != drm_rect_width(&pipe_cfg->dst_rect) ||  in dpu_plane_atomic_check()
895 		    drm_rect_height(&pipe_cfg->src_rect) != drm_rect_height(&pipe_cfg->dst_rect) ||  in dpu_plane_atomic_check()
900 					DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);  in dpu_plane_atomic_check()
915 		*r_pipe_cfg = *pipe_cfg;  in dpu_plane_atomic_check()
916 		pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;  in dpu_plane_atomic_check()
917 		pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;  in dpu_plane_atomic_check()
918 		r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;  in dpu_plane_atomic_check()
919 		r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;  in dpu_plane_atomic_check()
922 	drm_rect_rotate_inv(&pipe_cfg->src_rect,  in dpu_plane_atomic_check()
930 	ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_state->adjusted_mode);  in dpu_plane_atomic_check()
951 		ret = dpu_plane_check_inline_rotation(pdpu, sblk, pipe_cfg->src_rect, fmt);  in dpu_plane_atomic_check()
1035 				       struct dpu_sw_pipe_cfg *pipe_cfg,  in dpu_plane_sspp_update_pipe()  argument
1060 				pipe_cfg);  in dpu_plane_sspp_update_pipe()
1063 	_dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg, pstate->rotation);  in dpu_plane_sspp_update_pipe()
1094 	_dpu_plane_set_qos_lut(plane, pipe, fmt, pipe_cfg);  in dpu_plane_sspp_update_pipe()
1098 		_dpu_plane_set_ot_limit(plane, pipe, pipe_cfg, frame_rate);  in dpu_plane_sspp_update_pipe()
1116 	struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg;  in dpu_plane_sspp_atomic_update()  local
1141 	dpu_plane_sspp_update_pipe(plane, pipe, pipe_cfg, fmt,  in dpu_plane_sspp_atomic_update()
1155 						    &crtc->mode, pipe_cfg);  in dpu_plane_sspp_atomic_update()
1157 	pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, pipe_cfg);  in dpu_plane_sspp_atomic_update()
1276 	const struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg;  in dpu_plane_atomic_print_state()  local
1286 	drm_printf(p, "\tsrc[0]=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&pipe_cfg->src_rect));  in dpu_plane_atomic_print_state()
1287 	drm_printf(p, "\tdst[0]=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&pipe_cfg->dst_rect));  in dpu_plane_atomic_print_state()