Lines Matching refs:hw_ctl

633 	struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];  in dpu_encoder_assign_crtc_resources()  local
643 drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); in dpu_encoder_assign_crtc_resources()
654 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); in dpu_encoder_assign_crtc_resources()
1135 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local
1165 drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); in dpu_encoder_virt_atomic_mode_set()
1201 phys->hw_ctl = i < num_ctl ? to_dpu_hw_ctl(hw_ctl[i]) : NULL; in dpu_encoder_virt_atomic_mode_set()
1202 if (!phys->hw_ctl) { in dpu_encoder_virt_atomic_mode_set()
1546 ctl = phys->hw_ctl; in _dpu_encoder_trigger_flush()
1594 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_trigger_start()
1636 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_hw_reset()
1681 ctl = phys->hw_ctl; in _dpu_encoder_kickoff_phys()
1729 ctl = phys->hw_ctl; in dpu_encoder_trigger_kickoff_pending()
1889 struct dpu_hw_ctl *ctl = enc_master->hw_ctl; in dpu_encoder_prep_dsc()
2029 struct dpu_hw_ctl *ctl = phys_enc->hw_ctl; in dpu_encoder_helper_reset_mixers()
2034 if (phys_enc->hw_ctl->ops.clear_all_blendstages) in dpu_encoder_helper_reset_mixers()
2035 phys_enc->hw_ctl->ops.clear_all_blendstages(phys_enc->hw_ctl); in dpu_encoder_helper_reset_mixers()
2044 if (phys_enc->hw_ctl->ops.update_pending_flush_mixer) in dpu_encoder_helper_reset_mixers()
2045 phys_enc->hw_ctl->ops.update_pending_flush_mixer(ctl, hw_mixer[i]->idx); in dpu_encoder_helper_reset_mixers()
2048 if (phys_enc->hw_ctl->ops.setup_blendstage) in dpu_encoder_helper_reset_mixers()
2049 phys_enc->hw_ctl->ops.setup_blendstage(ctl, hw_mixer[i]->idx, NULL); in dpu_encoder_helper_reset_mixers()
2074 struct dpu_hw_ctl *ctl = enc_master->hw_ctl; in dpu_encoder_unprep_dsc()
2090 struct dpu_hw_ctl *ctl = phys_enc->hw_ctl; in dpu_encoder_helper_phys_cleanup()
2097 phys_enc->hw_ctl->ops.reset(ctl); in dpu_encoder_helper_phys_cleanup()
2112 if (phys_enc->hw_ctl->ops.update_pending_flush_wb) in dpu_encoder_helper_phys_cleanup()
2113 phys_enc->hw_ctl->ops.update_pending_flush_wb(ctl, phys_enc->hw_wb->idx); in dpu_encoder_helper_phys_cleanup()
2122 if (phys_enc->hw_ctl->ops.update_pending_flush_intf) in dpu_encoder_helper_phys_cleanup()
2123 phys_enc->hw_ctl->ops.update_pending_flush_intf(phys_enc->hw_ctl, in dpu_encoder_helper_phys_cleanup()
2132 if (phys_enc->hw_ctl->ops.update_pending_flush_merge_3d) in dpu_encoder_helper_phys_cleanup()
2133 phys_enc->hw_ctl->ops.update_pending_flush_merge_3d(ctl, in dpu_encoder_helper_phys_cleanup()
2141 if (phys_enc->hw_ctl->ops.update_pending_flush_cdm) in dpu_encoder_helper_phys_cleanup()
2142 phys_enc->hw_ctl->ops.update_pending_flush_cdm(phys_enc->hw_ctl, in dpu_encoder_helper_phys_cleanup()