444 		irq_status = dpu_core_irq_read(phys_enc->dpu_kms, irq_idx);  in dpu_encoder_helper_wait_for_irq()
577 			struct dpu_kms *dpu_kms,  in dpu_encoder_get_topology()  argument
602 	else if (!dpu_kms->catalog->caps->has_3d_merge)  in dpu_encoder_get_topology()
627 static void dpu_encoder_assign_crtc_resources(struct dpu_kms *dpu_kms,  in dpu_encoder_assign_crtc_resources()  argument
642 	num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_assign_crtc_resources()
644 	num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_assign_crtc_resources()
646 	num_dspp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_assign_crtc_resources()
668 	struct dpu_kms *dpu_kms;  in dpu_encoder_virt_atomic_check()  local
688 	dpu_kms = to_dpu_kms(priv->kms);  in dpu_encoder_virt_atomic_check()
698 	topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state, dsc);  in dpu_encoder_virt_atomic_check()
727 			ret = dpu_rm_reserve(&dpu_kms->rm, global_state,  in dpu_encoder_virt_atomic_check()
730 			dpu_encoder_assign_crtc_resources(dpu_kms, drm_enc,  in dpu_encoder_virt_atomic_check()
744 	struct dpu_kms *dpu_kms;  in _dpu_encoder_update_vsync_source()  local
765 	dpu_kms = to_dpu_kms(priv->kms);  in _dpu_encoder_update_vsync_source()
766 	hw_mdptop = dpu_kms->hw_mdp;  in _dpu_encoder_update_vsync_source()
836 	struct dpu_kms *dpu_kms;  in _dpu_encoder_resource_enable()  local
841 	dpu_kms = to_dpu_kms(priv->kms);  in _dpu_encoder_resource_enable()
851 	pm_runtime_get_sync(&dpu_kms->pdev->dev);  in _dpu_encoder_resource_enable()
860 	struct dpu_kms *dpu_kms;  in _dpu_encoder_resource_disable()  local
865 	dpu_kms = to_dpu_kms(priv->kms);  in _dpu_encoder_resource_disable()
878 	pm_runtime_put_sync(&dpu_kms->pdev->dev);  in _dpu_encoder_resource_disable()
1132 	struct dpu_kms *dpu_kms;  in dpu_encoder_virt_atomic_mode_set()  local
1150 	dpu_kms = to_dpu_kms(priv->kms);  in dpu_encoder_virt_atomic_mode_set()
1152 	global_state = dpu_kms_get_existing_global_state(dpu_kms);  in dpu_encoder_virt_atomic_mode_set()
1161 	num_pp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_virt_atomic_mode_set()
1164 	num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_virt_atomic_mode_set()
1171 	num_dsc = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_virt_atomic_mode_set()
1185 		dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,  in dpu_encoder_virt_atomic_mode_set()
2037 	global_state = dpu_kms_get_existing_global_state(phys_enc->dpu_kms);  in dpu_encoder_helper_reset_mixers()
2039 	num_lm = dpu_rm_get_assigned_resources(&phys_enc->dpu_kms->rm, global_state,  in dpu_encoder_helper_reset_mixers()
2352 				 struct dpu_kms *dpu_kms,  in dpu_encoder_setup_display()  argument
2367 	phys_params.dpu_kms = dpu_kms;  in dpu_encoder_setup_display()
2377 				dpu_kms->catalog->caps->has_idle_pc;  in dpu_encoder_setup_display()
2400 		phys_params.hw_intf = dpu_encoder_get_intf(dpu_kms->catalog, &dpu_kms->rm,  in dpu_encoder_setup_display()
2405 			phys_params.hw_wb = dpu_rm_get_wb(&dpu_kms->rm, controller_id);  in dpu_encoder_setup_display()
2420 		ret = dpu_encoder_virt_add_phys_encs(dpu_kms->dev, disp_info,  in dpu_encoder_setup_display()
2480 	struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);  in dpu_encoder_init()  local
2496 	ret = dpu_encoder_setup_display(dpu_enc, dpu_kms, disp_info);  in dpu_encoder_init()
2626 	phys_enc->hw_mdptop = p->dpu_kms->hw_mdp;  in dpu_encoder_phys_init()
2630 	phys_enc->dpu_kms = p->dpu_kms;  in dpu_encoder_phys_init()