Lines Matching refs:HHI_VID_CLK_CNTL
74 #define HHI_VID_CLK_CNTL 0x17c /* 0x5f offset in data sheet */ macro
885 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
894 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
903 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
912 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
921 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
930 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
945 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
959 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
973 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
987 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
1001 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, in meson_vclk_set()
1024 regmap_update_bits(priv->hhi, HHI_VID_CLK_CNTL, VCLK_EN, VCLK_EN); in meson_vclk_set()