Lines Matching +full:g +full:- +full:scaler
1 // SPDX-License-Identifier: GPL-2.0-or-later
81 if (!new_plane_state->crtc) in meson_plane_atomic_check()
85 new_plane_state->crtc); in meson_plane_atomic_check()
91 * - Upscaling up to 5x, vertical and horizontal in meson_plane_atomic_check()
92 * - Final coordinates must match crtc size in meson_plane_atomic_check()
117 switch (priv->afbcd.format) { in meson_g12a_afbcd_line_stride()
119 line_stride = ((priv->viu.osd1_width << 4) + 127) >> 7; in meson_g12a_afbcd_line_stride()
126 line_stride = ((priv->viu.osd1_width << 5) + 127) >> 7; in meson_g12a_afbcd_line_stride()
140 struct meson_drm *priv = meson_plane->priv; in meson_plane_atomic_update()
141 struct drm_framebuffer *fb = new_state->fb; in meson_plane_atomic_update()
160 spin_lock_irqsave(&priv->drm->event_lock, flags); in meson_plane_atomic_update()
165 fb->modifier & DRM_FORMAT_MOD_ARM_AFBC(MESON_MOD_AFBC_VALID_BITS)) in meson_plane_atomic_update()
166 priv->viu.osd1_afbcd = true; in meson_plane_atomic_update()
168 priv->viu.osd1_afbcd = false; in meson_plane_atomic_update()
171 priv->viu.osd1_ctrl_stat = OSD_ENABLE | in meson_plane_atomic_update()
175 priv->viu.osd1_ctrl_stat2 = readl(priv->io_base + in meson_plane_atomic_update()
178 canvas_id_osd1 = priv->canvas_id_osd1; in meson_plane_atomic_update()
181 priv->viu.osd1_blk0_cfg[0] = canvas_id_osd1 << OSD_CANVAS_SEL; in meson_plane_atomic_update()
183 if (priv->viu.osd1_afbcd) { in meson_plane_atomic_update()
186 priv->viu.osd1_blk1_cfg4 = MESON_G12A_AFBCD_OUT_ADDR; in meson_plane_atomic_update()
187 priv->viu.osd1_blk0_cfg[0] |= OSD_ENDIANNESS_BE; in meson_plane_atomic_update()
188 priv->viu.osd1_ctrl_stat2 |= OSD_PENDING_STAT_CLEAN; in meson_plane_atomic_update()
189 priv->viu.osd1_ctrl_stat |= VIU_OSD1_CFG_SYN_EN; in meson_plane_atomic_update()
193 priv->viu.osd1_blk0_cfg[0] |= OSD_ENDIANNESS_LE; in meson_plane_atomic_update()
194 priv->viu.osd1_ctrl_stat2 |= OSD_DPATH_MALI_AFBCD; in meson_plane_atomic_update()
197 priv->viu.osd1_blk0_cfg[0] |= OSD_ENDIANNESS_LE; in meson_plane_atomic_update()
200 priv->viu.osd1_ctrl_stat2 &= ~OSD_DPATH_MALI_AFBCD; in meson_plane_atomic_update()
203 /* On GXBB, Use the old non-HDR RGB2YUV converter */ in meson_plane_atomic_update()
205 priv->viu.osd1_blk0_cfg[0] |= OSD_OUTPUT_COLOR_RGB; in meson_plane_atomic_update()
207 if (priv->viu.osd1_afbcd && in meson_plane_atomic_update()
209 priv->viu.osd1_blk0_cfg[0] |= OSD_MALI_SRC_EN | in meson_plane_atomic_update()
210 priv->afbcd.ops->fmt_to_blk_mode(fb->modifier, in meson_plane_atomic_update()
211 fb->format->format); in meson_plane_atomic_update()
213 switch (fb->format->format) { in meson_plane_atomic_update()
216 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_32 | in meson_plane_atomic_update()
221 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_32 | in meson_plane_atomic_update()
225 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_24 | in meson_plane_atomic_update()
229 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_16 | in meson_plane_atomic_update()
235 switch (fb->format->format) { in meson_plane_atomic_update()
239 priv->viu.osd1_ctrl_stat2 |= OSD_REPLACE_EN; in meson_plane_atomic_update()
244 priv->viu.osd1_ctrl_stat2 &= ~OSD_REPLACE_EN; in meson_plane_atomic_update()
248 /* Default scaler parameters */ in meson_plane_atomic_update()
254 if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { in meson_plane_atomic_update()
261 hsc_ini_rpt_p0_num = (hf_bank_len / 2) - 1; in meson_plane_atomic_update()
262 vsc_ini_rpt_p0_num = (vf_bank_len / 2) - 1; in meson_plane_atomic_update()
264 src_w = fixed16_to_int(new_state->src_w); in meson_plane_atomic_update()
265 src_h = fixed16_to_int(new_state->src_h); in meson_plane_atomic_update()
266 dst_w = new_state->crtc_w; in meson_plane_atomic_update()
267 dst_h = new_state->crtc_h; in meson_plane_atomic_update()
273 * But the vertical scaler can provide such funtionnality if in meson_plane_atomic_update()
276 if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { in meson_plane_atomic_update()
285 if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) in meson_plane_atomic_update()
292 /* In interlaced mode, scaler is always active */ in meson_plane_atomic_update()
294 priv->viu.osd_sc_i_wh_m1 = SCI_WH_M1_W(src_w - 1) | in meson_plane_atomic_update()
295 SCI_WH_M1_H(src_h - 1); in meson_plane_atomic_update()
296 priv->viu.osd_sc_o_h_start_end = SCO_HV_START(dest.x1) | in meson_plane_atomic_update()
297 SCO_HV_END(dest.x2 - 1); in meson_plane_atomic_update()
298 priv->viu.osd_sc_o_v_start_end = SCO_HV_START(dest.y1) | in meson_plane_atomic_update()
299 SCO_HV_END(dest.y2 - 1); in meson_plane_atomic_update()
300 /* Enable OSD Scaler */ in meson_plane_atomic_update()
301 priv->viu.osd_sc_ctrl0 = SC_CTRL0_PATH_EN | SC_CTRL0_SEL_OSD1; in meson_plane_atomic_update()
303 priv->viu.osd_sc_i_wh_m1 = 0; in meson_plane_atomic_update()
304 priv->viu.osd_sc_o_h_start_end = 0; in meson_plane_atomic_update()
305 priv->viu.osd_sc_o_v_start_end = 0; in meson_plane_atomic_update()
306 priv->viu.osd_sc_ctrl0 = 0; in meson_plane_atomic_update()
309 /* In interlaced mode, vertical scaler is always active */ in meson_plane_atomic_update()
311 priv->viu.osd_sc_v_ctrl0 = in meson_plane_atomic_update()
317 if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) in meson_plane_atomic_update()
318 priv->viu.osd_sc_v_ctrl0 |= in meson_plane_atomic_update()
323 priv->viu.osd_sc_v_phase_step = SC_PHASE_STEP(vf_phase_step); in meson_plane_atomic_update()
324 priv->viu.osd_sc_v_ini_phase = VSC_INI_PHASE_BOT(bot_ini_phase); in meson_plane_atomic_update()
326 priv->viu.osd_sc_v_ctrl0 = 0; in meson_plane_atomic_update()
327 priv->viu.osd_sc_v_phase_step = 0; in meson_plane_atomic_update()
328 priv->viu.osd_sc_v_ini_phase = 0; in meson_plane_atomic_update()
331 /* Horizontal scaler is only used if width does not match */ in meson_plane_atomic_update()
333 priv->viu.osd_sc_h_ctrl0 = in meson_plane_atomic_update()
338 priv->viu.osd_sc_h_phase_step = SC_PHASE_STEP(hf_phase_step); in meson_plane_atomic_update()
339 priv->viu.osd_sc_h_ini_phase = 0; in meson_plane_atomic_update()
341 priv->viu.osd_sc_h_ctrl0 = 0; in meson_plane_atomic_update()
342 priv->viu.osd_sc_h_phase_step = 0; in meson_plane_atomic_update()
343 priv->viu.osd_sc_h_ini_phase = 0; in meson_plane_atomic_update()
349 * e.g. +30x1920 would be (1919 << 16) | 30 in meson_plane_atomic_update()
351 priv->viu.osd1_blk0_cfg[1] = in meson_plane_atomic_update()
352 ((fixed16_to_int(new_state->src.x2) - 1) << 16) | in meson_plane_atomic_update()
353 fixed16_to_int(new_state->src.x1); in meson_plane_atomic_update()
354 priv->viu.osd1_blk0_cfg[2] = in meson_plane_atomic_update()
355 ((fixed16_to_int(new_state->src.y2) - 1) << 16) | in meson_plane_atomic_update()
356 fixed16_to_int(new_state->src.y1); in meson_plane_atomic_update()
357 priv->viu.osd1_blk0_cfg[3] = ((dest.x2 - 1) << 16) | dest.x1; in meson_plane_atomic_update()
358 priv->viu.osd1_blk0_cfg[4] = ((dest.y2 - 1) << 16) | dest.y1; in meson_plane_atomic_update()
361 priv->viu.osd_blend_din0_scope_h = ((dest.x2 - 1) << 16) | dest.x1; in meson_plane_atomic_update()
362 priv->viu.osd_blend_din0_scope_v = ((dest.y2 - 1) << 16) | dest.y1; in meson_plane_atomic_update()
363 priv->viu.osb_blend0_size = dst_h << 16 | dst_w; in meson_plane_atomic_update()
364 priv->viu.osb_blend1_size = dst_h << 16 | dst_w; in meson_plane_atomic_update()
370 priv->viu.osd1_addr = gem->dma_addr; in meson_plane_atomic_update()
371 priv->viu.osd1_stride = fb->pitches[0]; in meson_plane_atomic_update()
372 priv->viu.osd1_height = fb->height; in meson_plane_atomic_update()
373 priv->viu.osd1_width = fb->width; in meson_plane_atomic_update()
375 if (priv->viu.osd1_afbcd) { in meson_plane_atomic_update()
376 priv->afbcd.modifier = fb->modifier; in meson_plane_atomic_update()
377 priv->afbcd.format = fb->format->format; in meson_plane_atomic_update()
381 priv->viu.osd1_blk2_cfg4 = in meson_plane_atomic_update()
385 if (!meson_plane->enabled) { in meson_plane_atomic_update()
391 meson_plane->enabled = true; in meson_plane_atomic_update()
394 priv->viu.osd1_enabled = true; in meson_plane_atomic_update()
396 spin_unlock_irqrestore(&priv->drm->event_lock, flags); in meson_plane_atomic_update()
403 struct meson_drm *priv = meson_plane->priv; in meson_plane_atomic_disable()
405 if (priv->afbcd.ops) { in meson_plane_atomic_disable()
406 priv->afbcd.ops->reset(priv); in meson_plane_atomic_disable()
407 priv->afbcd.ops->disable(priv); in meson_plane_atomic_disable()
413 priv->io_base + _REG(OSD1_BLEND_SRC_CTRL)); in meson_plane_atomic_disable()
416 priv->io_base + _REG(VPP_MISC)); in meson_plane_atomic_disable()
418 meson_plane->enabled = false; in meson_plane_atomic_disable()
419 priv->viu.osd1_enabled = false; in meson_plane_atomic_disable()
432 struct meson_drm *priv = meson_plane->priv; in meson_plane_format_mod_supported()
448 for (i = 0 ; i < plane->modifier_count ; ++i) in meson_plane_format_mod_supported()
449 if (plane->modifiers[i] == modifier) in meson_plane_format_mod_supported()
452 if (i == plane->modifier_count) { in meson_plane_format_mod_supported()
457 if (priv->afbcd.ops && priv->afbcd.ops->supported_fmt) in meson_plane_format_mod_supported()
458 return priv->afbcd.ops->supported_fmt(modifier, format); in meson_plane_format_mod_supported()
498 * - TOFIX Support AFBC modifiers for YUV formats (16x16 + TILED)
499 * - SPLIT is mandatory for performances reasons when in 16x16
501 * - 32x8 block size + SPLIT is mandatory with 4K frame size
539 meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane), in meson_plane_create()
542 return -ENOMEM; in meson_plane_create()
544 meson_plane->priv = priv; in meson_plane_create()
545 plane = &meson_plane->base; in meson_plane_create()
552 ret = drm_universal_plane_init(priv->drm, plane, 0xFF, in meson_plane_create()
559 devm_kfree(priv->drm->dev, meson_plane); in meson_plane_create()
568 priv->primary_plane = plane; in meson_plane_create()