Lines Matching refs:REG_DEF
476 #define REG_DEF(reg) { \ macro
483 REG_DEF(CRTC0_CFG),
484 REG_DEF(CRTC0_FB_ORIGIN),
485 REG_DEF(CRTC0_DVO_CONF),
486 REG_DEF(CRTC0_HDISPLAY),
487 REG_DEF(CRTC0_HSYNC),
488 REG_DEF(CRTC0_VDISPLAY),
489 REG_DEF(CRTC0_VSYNC),
490 REG_DEF(CRTC0_GAMMA_INDEX),
491 REG_DEF(CRTC0_GAMMA_DATA),
492 REG_DEF(CRTC0_SYNC_DEVIATION),
493 REG_DEF(CRTC0_VSYNC_COUNTER),
494 REG_DEF(CRTC0_SCAN_POS),
495 REG_DEF(CRTC0_STRIDE),
496 REG_DEF(CRTC0_FB1_ADDR_HI),
497 REG_DEF(CRTC0_FB1_ADDR_LO),
498 REG_DEF(CRTC0_FB0_ADDR_HI),
499 REG_DEF(CRTC0_FB0_ADDR_LO),
500 REG_DEF(CURSOR0_CFG),
501 REG_DEF(CURSOR0_POSITION),
502 REG_DEF(CURSOR0_BG_COLOR),
503 REG_DEF(CURSOR0_FG_COLOR),
506 REG_DEF(CRTC1_CFG),
507 REG_DEF(CRTC1_FB_ORIGIN),
508 REG_DEF(CRTC1_DVO_CONF),
509 REG_DEF(CRTC1_HDISPLAY),
510 REG_DEF(CRTC1_HSYNC),
511 REG_DEF(CRTC1_VDISPLAY),
512 REG_DEF(CRTC1_VSYNC),
513 REG_DEF(CRTC1_GAMMA_INDEX),
514 REG_DEF(CRTC1_GAMMA_DATA),
515 REG_DEF(CRTC1_SYNC_DEVIATION),
516 REG_DEF(CRTC1_VSYNC_COUNTER),
517 REG_DEF(CRTC1_SCAN_POS),
518 REG_DEF(CRTC1_STRIDE),
519 REG_DEF(CRTC1_FB1_ADDR_HI),
520 REG_DEF(CRTC1_FB1_ADDR_LO),
521 REG_DEF(CRTC1_FB0_ADDR_HI),
522 REG_DEF(CRTC1_FB0_ADDR_LO),
523 REG_DEF(CURSOR1_CFG),
524 REG_DEF(CURSOR1_POSITION),
525 REG_DEF(CURSOR1_BG_COLOR),
526 REG_DEF(CURSOR1_FG_COLOR),