1 // SPDX-License-Identifier: GPL-2.0+
17  * After the CRTC soft reset, the vblank counter would be reset to zero.
24 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_soft_reset()
31 	/* Soft reset bit, active low */  in lsdc_crtc0_soft_reset()
50 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_soft_reset()
57 	/* Soft reset bit, active low */  in lsdc_crtc1_soft_reset()
76 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_enable()
82 	 * This may happen in extremely rare cases, but a soft reset can  in lsdc_crtc0_enable()
87 		drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name);  in lsdc_crtc0_enable()
96 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_disable()
105 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_enable()
109 	 * This may happen in extremely rare cases, but a soft reset can  in lsdc_crtc1_enable()
115 		drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name);  in lsdc_crtc1_enable()
124 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_disable()
135 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_scan_pos()
146 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_scan_pos()
157 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_enable_vblank()
164 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_disable_vblank()
171 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_enable_vblank()
178 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_disable_vblank()
185 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_flip()
192 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_flip()
206 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_clone()
213 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_clone()
221 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_set_mode()
224 		    (mode->crtc_htotal << 16) | mode->crtc_hdisplay);  in lsdc_crtc0_set_mode()
227 		    (mode->crtc_vtotal << 16) | mode->crtc_vdisplay);  in lsdc_crtc0_set_mode()
230 		    (mode->crtc_hsync_end << 16) | mode->crtc_hsync_start | HSYNC_EN);  in lsdc_crtc0_set_mode()
233 		    (mode->crtc_vsync_end << 16) | mode->crtc_vsync_start | VSYNC_EN);  in lsdc_crtc0_set_mode()
239 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_set_mode()
242 		    (mode->crtc_htotal << 16) | mode->crtc_hdisplay);  in lsdc_crtc1_set_mode()
245 		    (mode->crtc_vtotal << 16) | mode->crtc_vdisplay);  in lsdc_crtc1_set_mode()
248 		    (mode->crtc_hsync_end << 16) | mode->crtc_hsync_start | HSYNC_EN);  in lsdc_crtc1_set_mode()
251 		    (mode->crtc_vsync_end << 16) | mode->crtc_vsync_start | VSYNC_EN);  in lsdc_crtc1_set_mode()
262  * Only touch CRTC hardware-related parts.
267 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_reset()
274 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_reset()
281 		.enable = lsdc_crtc0_enable,
290 		.reset = lsdc_crtc0_reset,
293 		.enable = lsdc_crtc1_enable,
302 		.reset = lsdc_crtc1_reset,
307  * The 32-bit hardware vblank counter has been available since LS7A2000
309  * it will be reset only if the CRTC is being soft reset.
316 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_get_vblank_count()
323 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_get_vblank_count()
338 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc0_set_dma_step()
350 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc1_set_dma_step()
361 		.enable = lsdc_crtc0_enable,
372 		.reset = lsdc_crtc0_reset,
375 		.enable = lsdc_crtc1_enable,
386 		.reset = lsdc_crtc1_reset,
393 	const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops;  in lsdc_crtc_reset()
396 	if (crtc->state)  in lsdc_crtc_reset()
397 		crtc->funcs->atomic_destroy_state(crtc, crtc->state);  in lsdc_crtc_reset()
404 		__drm_atomic_helper_crtc_reset(crtc, &priv_crtc_state->base);  in lsdc_crtc_reset()
406 	/* Reset the CRTC hardware, this is required for S3 support */  in lsdc_crtc_reset()
407 	ops->reset(lcrtc);  in lsdc_crtc_reset()
415 	__drm_atomic_helper_crtc_destroy_state(&priv_state->base);  in lsdc_crtc_atomic_destroy_state()
430 	__drm_atomic_helper_crtc_duplicate_state(crtc, &new_priv_state->base);  in lsdc_crtc_atomic_duplicate_state()
432 	old_priv_state = to_lsdc_crtc_state(crtc->state);  in lsdc_crtc_atomic_duplicate_state()
434 	memcpy(&new_priv_state->pparms, &old_priv_state->pparms,  in lsdc_crtc_atomic_duplicate_state()
435 	       sizeof(new_priv_state->pparms));  in lsdc_crtc_atomic_duplicate_state()
437 	return &new_priv_state->base;  in lsdc_crtc_atomic_duplicate_state()
444 	/* 32-bit hardware vblank counter */  in lsdc_crtc_get_vblank_counter()
445 	return lcrtc->hw_ops->get_vblank_counter(lcrtc);  in lsdc_crtc_get_vblank_counter()
452 	if (!lcrtc->has_vblank)  in lsdc_crtc_enable_vblank()
453 		return -EINVAL;  in lsdc_crtc_enable_vblank()
455 	lcrtc->hw_ops->enable_vblank(lcrtc);  in lsdc_crtc_enable_vblank()
464 	if (!lcrtc->has_vblank)  in lsdc_crtc_disable_vblank()
467 	lcrtc->hw_ops->disable_vblank(lcrtc);  in lsdc_crtc_disable_vblank()
473  * For the sake of convenience, plane-related registers are also add here.
532 	struct drm_info_node *node = (struct drm_info_node *)m->private;  in lsdc_crtc_show_regs()
533 	struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data;  in lsdc_crtc_show_regs()
534 	struct lsdc_device *ldev = lcrtc->ldev;  in lsdc_crtc_show_regs()
537 	for (i = 0; i < lcrtc->nreg; i++) {  in lsdc_crtc_show_regs()
538 		const struct lsdc_reg32 *preg = &lcrtc->preg[i];  in lsdc_crtc_show_regs()
539 		u32 offset = preg->offset;  in lsdc_crtc_show_regs()
542 			   preg->name, offset, lsdc_rreg32(ldev, offset));  in lsdc_crtc_show_regs()
550 	struct drm_info_node *node = (struct drm_info_node *)m->private;  in lsdc_crtc_show_scan_position()
551 	struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data;  in lsdc_crtc_show_scan_position()
554 	lcrtc->hw_ops->get_scan_pos(lcrtc, &x, &y);  in lsdc_crtc_show_scan_position()
562 	struct drm_info_node *node = (struct drm_info_node *)m->private;  in lsdc_crtc_show_vblank_counter()
563 	struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data;  in lsdc_crtc_show_vblank_counter()
565 	if (lcrtc->hw_ops->get_vblank_counter)  in lsdc_crtc_show_vblank_counter()
566 		seq_printf(m, "%s vblank counter: %08u\n\n", lcrtc->base.name,  in lsdc_crtc_show_vblank_counter()
567 			   lcrtc->hw_ops->get_vblank_counter(lcrtc));  in lsdc_crtc_show_vblank_counter()
574 	struct drm_info_node *node = (struct drm_info_node *)m->private;  in lsdc_pixpll_show_clock()
575 	struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data;  in lsdc_pixpll_show_clock()
576 	struct lsdc_pixpll *pixpll = &lcrtc->pixpll;  in lsdc_pixpll_show_clock()
577 	const struct lsdc_pixpll_funcs *funcs = pixpll->funcs;  in lsdc_pixpll_show_clock()
578 	struct drm_crtc *crtc = &lcrtc->base;  in lsdc_pixpll_show_clock()
579 	struct drm_display_mode *mode = &crtc->state->mode;  in lsdc_pixpll_show_clock()
583 	out_khz = funcs->get_rate(pixpll);  in lsdc_pixpll_show_clock()
585 	seq_printf(m, "%s: %dx%d@%d\n", crtc->name,  in lsdc_pixpll_show_clock()
586 		   mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode));  in lsdc_pixpll_show_clock()
588 	seq_printf(m, "Pixel clock required: %d kHz\n", mode->clock);  in lsdc_pixpll_show_clock()
590 	seq_printf(m, "Diff: %d kHz\n", out_khz - mode->clock);  in lsdc_pixpll_show_clock()
592 	funcs->print(pixpll, &printer);  in lsdc_pixpll_show_clock()
616 	seq_puts(m, "soft_reset: soft reset this CRTC\n");  in lsdc_crtc_man_op_show()
617 	seq_puts(m, "enable: enable this CRTC\n");  in lsdc_crtc_man_op_show()
627 	struct drm_crtc *crtc = inode->i_private;  in lsdc_crtc_man_op_open()
637 	struct seq_file *m = file->private_data;  in lsdc_crtc_man_op_write()
638 	struct lsdc_crtc *lcrtc = m->private;  in lsdc_crtc_man_op_write()
639 	const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops;  in lsdc_crtc_man_op_write()
642 	if (len > sizeof(buf) - 1)  in lsdc_crtc_man_op_write()
643 		return -EINVAL;  in lsdc_crtc_man_op_write()
646 		return -EFAULT;  in lsdc_crtc_man_op_write()
651 		ops->soft_reset(lcrtc);  in lsdc_crtc_man_op_write()
652 	else if (sysfs_streq(buf, "enable"))  in lsdc_crtc_man_op_write()
653 		ops->enable(lcrtc);  in lsdc_crtc_man_op_write()
655 		ops->disable(lcrtc);  in lsdc_crtc_man_op_write()
657 		ops->flip(lcrtc);  in lsdc_crtc_man_op_write()
659 		ops->clone(lcrtc);  in lsdc_crtc_man_op_write()
677 	struct drm_minor *minor = crtc->dev->primary;  in lsdc_crtc_late_register()
678 	unsigned int index = dispipe->index;  in lsdc_crtc_late_register()
681 	lcrtc->preg = lsdc_crtc_regs_array[index];  in lsdc_crtc_late_register()
682 	lcrtc->nreg = ARRAY_SIZE(lsdc_crtc_regs_array[index]);  in lsdc_crtc_late_register()
683 	lcrtc->p_info_list = lsdc_crtc_debugfs_list[index];  in lsdc_crtc_late_register()
684 	lcrtc->n_info_list = ARRAY_SIZE(lsdc_crtc_debugfs_list[index]);  in lsdc_crtc_late_register()
686 	for (i = 0; i < lcrtc->n_info_list; ++i)  in lsdc_crtc_late_register()
687 		lcrtc->p_info_list[i].data = lcrtc;  in lsdc_crtc_late_register()
689 	drm_debugfs_create_files(lcrtc->p_info_list, lcrtc->n_info_list,  in lsdc_crtc_late_register()
690 				 crtc->debugfs_entry, minor);  in lsdc_crtc_late_register()
693 	debugfs_create_file("ops", 0644, crtc->debugfs_entry, lcrtc,  in lsdc_crtc_late_register()
706 	pparms = &priv_state->pparms;  in lsdc_crtc_atomic_print_state()
708 	drm_printf(p, "\tInput clock divider = %u\n", pparms->div_ref);  in lsdc_crtc_atomic_print_state()
709 	drm_printf(p, "\tMedium clock multiplier = %u\n", pparms->loopc);  in lsdc_crtc_atomic_print_state()
710 	drm_printf(p, "\tOutput clock divider = %u\n", pparms->div_out);  in lsdc_crtc_atomic_print_state()
714 	.reset = lsdc_crtc_reset,
728 	.reset = lsdc_crtc_reset,
745 	struct drm_device *ddev = crtc->dev;  in lsdc_crtc_mode_valid()
747 	const struct lsdc_desc *descp = ldev->descp;  in lsdc_crtc_mode_valid()
750 	if (mode->hdisplay > descp->max_width)  in lsdc_crtc_mode_valid()
753 	if (mode->vdisplay > descp->max_height)  in lsdc_crtc_mode_valid()
756 	if (mode->clock > descp->max_pixel_clk) {  in lsdc_crtc_mode_valid()
758 			    mode->hdisplay, mode->vdisplay, mode->clock);  in lsdc_crtc_mode_valid()
763 	pitch = mode->hdisplay * 4;  in lsdc_crtc_mode_valid()
765 	if (pitch % descp->pitch_align) {  in lsdc_crtc_mode_valid()
767 			    descp->pitch_align, pitch);  in lsdc_crtc_mode_valid()
778 	struct lsdc_pixpll *pixpll = &lcrtc->pixpll;  in lsdc_pixpll_atomic_check()
779 	const struct lsdc_pixpll_funcs *pfuncs = pixpll->funcs;  in lsdc_pixpll_atomic_check()
781 	unsigned int clock = state->mode.clock;  in lsdc_pixpll_atomic_check()
784 	ret = pfuncs->compute(pixpll, clock, &priv_state->pparms);  in lsdc_pixpll_atomic_check()
786 		drm_warn(crtc->dev, "Failed to find PLL params for %ukHz\n",  in lsdc_pixpll_atomic_check()
788 		return -EINVAL;  in lsdc_pixpll_atomic_check()
799 	if (!crtc_state->enable)  in lsdc_crtc_helper_atomic_check()
808 	const struct lsdc_crtc_hw_ops *crtc_hw_ops = lcrtc->hw_ops;  in lsdc_crtc_mode_set_nofb()
809 	struct lsdc_pixpll *pixpll = &lcrtc->pixpll;  in lsdc_crtc_mode_set_nofb()
810 	const struct lsdc_pixpll_funcs *pixpll_funcs = pixpll->funcs;  in lsdc_crtc_mode_set_nofb()
811 	struct drm_crtc_state *state = crtc->state;  in lsdc_crtc_mode_set_nofb()
812 	struct drm_display_mode *mode = &state->mode;  in lsdc_crtc_mode_set_nofb()
815 	pixpll_funcs->update(pixpll, &priv_state->pparms);  in lsdc_crtc_mode_set_nofb()
817 	if (crtc_hw_ops->set_dma_step) {  in lsdc_crtc_mode_set_nofb()
818 		unsigned int width_in_bytes = mode->hdisplay * 4;  in lsdc_crtc_mode_set_nofb()
834 		crtc_hw_ops->set_dma_step(lcrtc, dma_step);  in lsdc_crtc_mode_set_nofb()
837 	crtc_hw_ops->set_mode(lcrtc, mode);  in lsdc_crtc_mode_set_nofb()
842 	struct drm_device *ddev = crtc->dev;  in lsdc_crtc_send_vblank()
845 	if (!crtc->state || !crtc->state->event)  in lsdc_crtc_send_vblank()
850 	spin_lock_irqsave(&ddev->event_lock, flags);  in lsdc_crtc_send_vblank()
851 	drm_crtc_send_vblank_event(crtc, crtc->state->event);  in lsdc_crtc_send_vblank()
852 	crtc->state->event = NULL;  in lsdc_crtc_send_vblank()
853 	spin_unlock_irqrestore(&ddev->event_lock, flags);  in lsdc_crtc_send_vblank()
861 	if (lcrtc->has_vblank)  in lsdc_crtc_atomic_enable()
864 	lcrtc->hw_ops->enable(lcrtc);  in lsdc_crtc_atomic_enable()
872 	if (lcrtc->has_vblank)  in lsdc_crtc_atomic_disable()
875 	lcrtc->hw_ops->disable(lcrtc);  in lsdc_crtc_atomic_disable()
887 	spin_lock_irq(&crtc->dev->event_lock);  in lsdc_crtc_atomic_flush()
888 	if (crtc->state->event) {  in lsdc_crtc_atomic_flush()
890 			drm_crtc_arm_vblank_event(crtc, crtc->state->event);  in lsdc_crtc_atomic_flush()
892 			drm_crtc_send_vblank_event(crtc, crtc->state->event);  in lsdc_crtc_atomic_flush()
893 		crtc->state->event = NULL;  in lsdc_crtc_atomic_flush()
895 	spin_unlock_irq(&crtc->dev->event_lock);  in lsdc_crtc_atomic_flush()
907 	const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops;  in lsdc_crtc_get_scanout_position()
911 	vsw = mode->crtc_vsync_end - mode->crtc_vsync_start;  in lsdc_crtc_get_scanout_position()
912 	vbp = mode->crtc_vtotal - mode->crtc_vsync_end;  in lsdc_crtc_get_scanout_position()
915 	vactive_end = vactive_start + mode->crtc_vdisplay;  in lsdc_crtc_get_scanout_position()
918 	vfp_end = mode->crtc_vtotal;  in lsdc_crtc_get_scanout_position()
923 	ops->get_scan_pos(lcrtc, &x, &y);  in lsdc_crtc_get_scanout_position()
926 		y = y - vfp_end - vactive_start;  in lsdc_crtc_get_scanout_position()
928 		y -= vactive_start;  in lsdc_crtc_get_scanout_position()
959 	ret = lsdc_pixpll_init(&lcrtc->pixpll, ddev, index);  in ls7a1000_crtc_init()
965 	lcrtc->ldev = to_lsdc(ddev);  in ls7a1000_crtc_init()
966 	lcrtc->has_vblank = has_vblank;  in ls7a1000_crtc_init()
967 	lcrtc->hw_ops = &ls7a1000_crtc_hw_ops[index];  in ls7a1000_crtc_init()
971 					"LS-CRTC-%d", index);  in ls7a1000_crtc_init()
998 	ret = lsdc_pixpll_init(&lcrtc->pixpll, ddev, index);  in ls7a2000_crtc_init()
1004 	lcrtc->ldev = to_lsdc(ddev);  in ls7a2000_crtc_init()
1005 	lcrtc->has_vblank = has_vblank;  in ls7a2000_crtc_init()
1006 	lcrtc->hw_ops = &ls7a2000_crtc_hw_ops[index];  in ls7a2000_crtc_init()
1010 					"LS-CRTC-%u", index);  in ls7a2000_crtc_init()