Lines Matching full:x4

12 #define LCD_CONTROL				(0x4 * 0x000)
52 #define LCD_INT_STATUS				(0x4 * 0x001)
81 #define LCD_INT_ENABLE				(0x4 * 0x002)
82 #define LCD_INT_CLEAR				(0x4 * 0x003)
83 #define LCD_LINE_COUNT				(0x4 * 0x004)
84 #define LCD_LINE_COMPARE			(0x4 * 0x005)
85 #define LCD_VSTATUS				(0x4 * 0x006)
91 #define LCD_VSTATUS_COMPARE			(0x4 * 0x007)
98 #define LCD_SCREEN_WIDTH			(0x4 * 0x008)
99 #define LCD_SCREEN_HEIGHT			(0x4 * 0x009)
100 #define LCD_FIELD_INT_CFG			(0x4 * 0x00a)
101 #define LCD_FIFO_FLUSH				(0x4 * 0x00b)
102 #define LCD_BG_COLOUR_LS			(0x4 * 0x00c)
103 #define LCD_BG_COLOUR_MS			(0x4 * 0x00d)
104 #define LCD_RAM_CFG			        (0x4 * 0x00e)
109 #define LCD_LAYER0_CFG		        (0x4 * 0x100)
176 #define LCD_LAYER0_COL_START		(0x4 * 0x101)
178 #define LCD_LAYER0_ROW_START		(0x4 * 0x102)
180 #define LCD_LAYER0_WIDTH		(0x4 * 0x103)
182 #define LCD_LAYER0_HEIGHT		(0x4 * 0x104)
184 #define LCD_LAYER0_SCALE_CFG		(0x4 * 0x105)
186 #define LCD_LAYER0_ALPHA		(0x4 * 0x106)
188 #define LCD_LAYER0_INV_COLOUR_LS	(0x4 * 0x107)
191 #define LCD_LAYER0_INV_COLOUR_MS	(0x4 * 0x108)
194 #define LCD_LAYER0_TRANS_COLOUR_LS	(0x4 * 0x109)
197 #define LCD_LAYER0_TRANS_COLOUR_MS	(0x4 * 0x10a)
200 #define LCD_LAYER0_CSC_COEFF11		(0x4 * 0x10b)
202 #define LCD_LAYER0_CSC_COEFF12		(0x4 * 0x10c)
204 #define LCD_LAYER0_CSC_COEFF13		(0x4 * 0x10d)
206 #define LCD_LAYER0_CSC_COEFF21		(0x4 * 0x10e)
208 #define LCD_LAYER0_CSC_COEFF22		(0x4 * 0x10f)
210 #define LCD_LAYER0_CSC_COEFF23		(0x4 * 0x110)
212 #define LCD_LAYER0_CSC_COEFF31		(0x4 * 0x111)
214 #define LCD_LAYER0_CSC_COEFF32		(0x4 * 0x112)
216 #define LCD_LAYER0_CSC_COEFF33		(0x4 * 0x113)
218 #define LCD_LAYER0_CSC_OFF1		(0x4 * 0x114)
220 #define LCD_LAYER0_CSC_OFF2		(0x4 * 0x115)
222 #define LCD_LAYER0_CSC_OFF3		(0x4 * 0x116)
226 #define LCD_LAYER0_DMA_CFG			(0x4 * 0x117)
254 #define LCD_LAYER0_DMA_START_ADR		(0x4 * 0x118)
257 #define LCD_LAYER0_DMA_START_SHADOW		(0x4 * 0x119)
260 #define LCD_LAYER0_DMA_LEN			(0x4 * 0x11a)
263 #define LCD_LAYER0_DMA_LEN_SHADOW		(0x4 * 0x11b)
266 #define LCD_LAYER0_DMA_STATUS			(0x4 * 0x11c)
269 #define LCD_LAYER0_DMA_LINE_WIDTH		(0x4 * 0x11d)
272 #define LCD_LAYER0_DMA_LINE_VSTRIDE		(0x4 * 0x11e)
275 #define LCD_LAYER0_DMA_FIFO_STATUS		(0x4 * 0x11f)
278 #define LCD_LAYER0_CFG2				(0x4 * 0x120)
280 #define LCD_LAYER0_DMA_START_CB_ADR		(0x4 * 0x700)
283 #define LCD_LAYER0_DMA_START_CB_SHADOW		(0x4 * 0x701)
286 #define LCD_LAYER0_DMA_CB_LINE_WIDTH		(0x4 * 0x702)
289 #define LCD_LAYER0_DMA_CB_LINE_VSTRIDE		(0x4 * 0x703)
292 #define LCD_LAYER0_DMA_START_CR_ADR		(0x4 * 0x704)
295 #define LCD_LAYER0_DMA_START_CR_SHADOW		(0x4 * 0x705)
299 #define LCD_LAYER0_DMA_CR_LINE_WIDTH		(0x4 * 0x706)
302 #define LCD_LAYER0_DMA_CR_LINE_VSTRIDE		(0x4 * 0x707)
305 #define LCD_LAYER1_DMA_START_CB_ADR		(0x4 * 0x708)
306 #define LCD_LAYER1_DMA_START_CB_SHADOW		(0x4 * 0x709)
307 #define LCD_LAYER1_DMA_CB_LINE_WIDTH		(0x4 * 0x70a)
308 #define LCD_LAYER1_DMA_CB_LINE_VSTRIDE		(0x4 * 0x70b)
309 #define LCD_LAYER1_DMA_START_CR_ADR		(0x4 * 0x70c)
310 #define LCD_LAYER1_DMA_START_CR_SHADOW		(0x4 * 0x70d)
311 #define LCD_LAYER1_DMA_CR_LINE_WIDTH		(0x4 * 0x70e)
312 #define LCD_LAYER1_DMA_CR_LINE_VSTRIDE		(0x4 * 0x70f)
317 #define LCD_OUT_FORMAT_CFG			(0x4 * 0x800)
352 #define LCD_HSYNC_WIDTH				(0x4 * 0x801)
353 #define LCD_H_BACKPORCH				(0x4 * 0x802)
354 #define LCD_H_ACTIVEWIDTH			(0x4 * 0x803)
355 #define LCD_H_FRONTPORCH			(0x4 * 0x804)
356 #define LCD_VSYNC_WIDTH				(0x4 * 0x805)
357 #define LCD_V_BACKPORCH				(0x4 * 0x806)
358 #define LCD_V_ACTIVEHEIGHT			(0x4 * 0x807)
359 #define LCD_V_FRONTPORCH			(0x4 * 0x808)
360 #define LCD_VSYNC_START				(0x4 * 0x809)
361 #define LCD_VSYNC_END				(0x4 * 0x80a)
362 #define LCD_V_BACKPORCH_EVEN			(0x4 * 0x80b)
363 #define LCD_VSYNC_WIDTH_EVEN			(0x4 * 0x80c)
364 #define LCD_V_ACTIVEHEIGHT_EVEN			(0x4 * 0x80d)
365 #define LCD_V_FRONTPORCH_EVEN			(0x4 * 0x80e)
366 #define LCD_VSYNC_START_EVEN			(0x4 * 0x80f)
367 #define LCD_VSYNC_END_EVEN			(0x4 * 0x810)
368 #define LCD_TIMING_GEN_TRIG			(0x4 * 0x811)
369 #define LCD_PWM0_CTRL				(0x4 * 0x812)
370 #define LCD_PWM0_RPT_LEADIN			(0x4 * 0x813)
371 #define LCD_PWM0_HIGH_LOW			(0x4 * 0x814)
372 #define LCD_PWM1_CTRL				(0x4 * 0x815)
373 #define LCD_PWM1_RPT_LEADIN			(0x4 * 0x816)
374 #define LCD_PWM1_HIGH_LOW			(0x4 * 0x817)
375 #define LCD_PWM2_CTRL				(0x4 * 0x818)
376 #define LCD_PWM2_RPT_LEADIN			(0x4 * 0x819)
377 #define LCD_PWM2_HIGH_LOW			(0x4 * 0x81a)
378 #define LCD_VIDEO0_DMA0_BYTES			(0x4 * 0xb00)
379 #define LCD_VIDEO0_DMA0_STATE			(0x4 * 0xb01)
381 #define LCD_VIDEO0_DMA1_BYTES			(0x4 * 0xb02)
382 #define LCD_VIDEO0_DMA1_STATE			(0x4 * 0xb03)
383 #define LCD_VIDEO0_DMA2_BYTES			(0x4 * 0xb04)
384 #define LCD_VIDEO0_DMA2_STATE			(0x4 * 0xb05)
385 #define LCD_VIDEO1_DMA0_BYTES			(0x4 * 0xb06)
386 #define LCD_VIDEO1_DMA0_STATE			(0x4 * 0xb07)
387 #define LCD_VIDEO1_DMA1_BYTES			(0x4 * 0xb08)
388 #define LCD_VIDEO1_DMA1_STATE			(0x4 * 0xb09)
389 #define LCD_VIDEO1_DMA2_BYTES			(0x4 * 0xb0a)
390 #define LCD_VIDEO1_DMA2_STATE			(0x4 * 0xb0b)
391 #define LCD_GRAPHIC0_DMA_BYTES			(0x4 * 0xb0c)
392 #define LCD_GRAPHIC0_DMA_STATE			(0x4 * 0xb0d)
393 #define LCD_GRAPHIC1_DMA_BYTES			(0x4 * 0xb0e)
394 #define LCD_GRAPHIC1_DMA_STATE			(0x4 * 0xb0f)
463 				+ (0x4 * (N)))
467 				+ (0x4 * (N)))
471 				+ (0x4 * (N)))
475 				+ (0x4 * (N)))
479 				+ (0x4 * (N)))
483 				+ (0x4 * (N)))
487 				+ (0x4 * (N)))
491 				+ (0x4 * (N)))
495 				+ (0x4 * (N)))
499 				+ (0x4 * (N)))
503 				+ (0x4 * (N)))
513 			+ (0x4 * (N)))
522 				+ (0x4 * (N)))