Lines Matching refs:pvr_cr_write64
33 pvr_cr_write64(pvr_dev, ROGUE_CR_AXI_ACE_LITE_CONFIGURATION, reg_val); in rogue_axi_ace_list_init()
50 pvr_cr_write64(pvr_dev, BIF_CAT_BASEX(MMU_CONTEXT_MAPPING_FWPRIV), in rogue_bif_init()
118 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, soft_reset_mask); in pvr_fw_start()
120 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET2, ROGUE_CR_SOFT_RESET2_MASKFULL); in pvr_fw_start()
128 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, in pvr_fw_start()
131 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET2, 0); in pvr_fw_start()
138 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, ROGUE_CR_SOFT_RESET_GARTEN_EN); in pvr_fw_start()
140 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET2, 0); in pvr_fw_start()
164 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, 0x0); in pvr_fw_start()
174 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, soft_reset_mask); in pvr_fw_start()
300 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, in pvr_fw_stop()
303 pvr_cr_write64(pvr_dev, ROGUE_CR_SOFT_RESET, ROGUE_CR_SOFT_RESET_MASKFULL); in pvr_fw_stop()