Lines Matching defs:pvr_device_features
14 struct pvr_device_features { struct
15 bool has_axi_acelite;
16 bool has_cdm_control_stream_format;
17 bool has_cluster_grouping;
18 bool has_common_store_size_in_dwords;
19 bool has_compute;
20 bool has_compute_morton_capable;
21 bool has_compute_overlap;
22 bool has_coreid_per_os;
23 bool has_dynamic_dust_power;
24 bool has_ecc_rams;
25 bool has_fb_cdc_v4;
26 bool has_fbc_max_default_descriptors;
27 bool has_fbc_max_large_descriptors;
28 bool has_fbcdc;
29 bool has_fbcdc_algorithm;
30 bool has_fbcdc_architecture;
31 bool has_gpu_multicore_support;
32 bool has_gpu_virtualisation;
33 bool has_gs_rta_support;
34 bool has_irq_per_os;
35 bool has_isp_max_tiles_in_flight;
36 bool has_isp_samples_per_pixel;
37 bool has_isp_zls_d24_s8_packing_ogl_mode;
38 bool has_layout_mars;
39 bool has_max_partitions;
40 bool has_meta;
41 bool has_meta_coremem_size;
42 bool has_mips;
43 bool has_num_clusters;
44 bool has_num_isp_ipp_pipes;
45 bool has_num_osids;
46 bool has_num_raster_pipes;
47 bool has_pbe2_in_xe;
48 bool has_pbvnc_coreid_reg;
49 bool has_perfbus;
50 bool has_perf_counter_batch;
51 bool has_phys_bus_width;
52 bool has_riscv_fw_processor;
53 bool has_roguexe;
54 bool has_s7_top_infrastructure;
55 bool has_simple_internal_parameter_format;
56 bool has_simple_internal_parameter_format_v2;
57 bool has_simple_parameter_format_version;
58 bool has_slc_banks;
59 bool has_slc_cache_line_size_bits;
60 bool has_slc_size_configurable;
61 bool has_slc_size_in_kilobytes;
62 bool has_soc_timer;
63 bool has_sys_bus_secure_reset;
64 bool has_tessellation;
65 bool has_tile_region_protection;
66 bool has_tile_size_x;
67 bool has_tile_size_y;
68 bool has_tla;
69 bool has_tpu_cem_datamaster_global_registers;
70 bool has_tpu_dm_global_registers;
71 bool has_tpu_filtering_mode_control;
72 bool has_usc_min_output_registers_per_pix;
73 bool has_vdm_drawindirect;
74 bool has_vdm_object_level_lls;
75 bool has_virtual_address_space_bits;
76 bool has_watchdog_timer;
77 bool has_workgroup_protection;
78 bool has_xe_architecture;
79 bool has_xe_memory_hierarchy;
80 bool has_xe_tpu2;
81 bool has_xpu_max_regbanks_addr_width;
82 bool has_xpu_max_slaves;
83 bool has_xpu_register_broadcast;
84 bool has_xt_top_infrastructure;
85 bool has_zls_subtile;
87 u64 cdm_control_stream_format;
88 u64 common_store_size_in_dwords;
89 u64 ecc_rams;
90 u64 fbc_max_default_descriptors;
91 u64 fbc_max_large_descriptors;
92 u64 fbcdc;
93 u64 fbcdc_algorithm;
94 u64 fbcdc_architecture;
95 u64 isp_max_tiles_in_flight;
96 u64 isp_samples_per_pixel;
97 u64 layout_mars;
98 u64 max_partitions;
99 u64 meta;
100 u64 meta_coremem_size;
101 u64 num_clusters;
102 u64 num_isp_ipp_pipes;
103 u64 num_osids;
104 u64 num_raster_pipes;
105 u64 phys_bus_width;
106 u64 simple_parameter_format_version;
107 u64 slc_banks;
108 u64 slc_cache_line_size_bits;
109 u64 slc_size_in_kilobytes;
110 u64 tile_size_x;
111 u64 tile_size_y;
112 u64 usc_min_output_registers_per_pix;
113 u64 virtual_address_space_bits;
114 u64 xe_architecture;
115 u64 xpu_max_regbanks_addr_width;
116 u64 xpu_max_slaves;
117 u64 xpu_register_broadcast;