Lines Matching refs:REG_GENMASK
82 #define MLTR_WM2_MASK REG_GENMASK(13, 8)
83 #define MLTR_WM1_MASK REG_GENMASK(5, 0)
126 #define DG1_DRAM_T_RDPRE_MASK REG_GENMASK(16, 11)
127 #define DG1_DRAM_T_RP_MASK REG_GENMASK(6, 0)
129 #define DG1_DRAM_T_RCD_MASK REG_GENMASK(15, 9)
130 #define DG1_DRAM_T_RAS_MASK REG_GENMASK(8, 1)
189 #define DG1_QCLK_RATIO_MASK REG_GENMASK(9, 2)
204 #define PKG_PWR_UNIT REG_GENMASK(3, 0)
205 #define PKG_ENERGY_UNIT REG_GENMASK(12, 8)
206 #define PKG_TIME_UNIT REG_GENMASK(19, 16)
212 #define RP0_CAP_MASK REG_GENMASK(7, 0)
213 #define RP1_CAP_MASK REG_GENMASK(15, 8)
214 #define RPN_CAP_MASK REG_GENMASK(23, 16)
217 #define RPE_MASK REG_GENMASK(15, 8)
219 #define PKG_PWR_LIM_1 REG_GENMASK(14, 0)
221 #define PKG_PWR_LIM_1_TIME REG_GENMASK(23, 17)
222 #define PKG_PWR_LIM_1_TIME_X REG_GENMASK(23, 22)
223 #define PKG_PWR_LIM_1_TIME_Y REG_GENMASK(21, 17)
233 #define SSKPD_WM3_MASK_SNB REG_GENMASK(29, 24)
234 #define SSKPD_WM2_MASK_SNB REG_GENMASK(21, 16)
235 #define SSKPD_WM1_MASK_SNB REG_GENMASK(13, 8)
236 #define SSKPD_WM0_MASK_SNB REG_GENMASK(5, 0)