Lines Matching refs:vgpu_vreg_t
255 vgpu_vreg_t(vgpu, GEN6_GT_THREAD_STATUS_REG) = 0; in intel_vgpu_reset_mmio()
258 vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0; in intel_vgpu_reset_mmio()
261 vgpu_vreg_t(vgpu, GUC_STATUS) |= GS_MIA_IN_RESET; in intel_vgpu_reset_mmio()
264 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= in intel_vgpu_reset_mmio()
266 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()
268 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &= in intel_vgpu_reset_mmio()
270 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()
272 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &= in intel_vgpu_reset_mmio()
274 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &= in intel_vgpu_reset_mmio()
276 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |= in intel_vgpu_reset_mmio()
279 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &= in intel_vgpu_reset_mmio()
281 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |= in intel_vgpu_reset_mmio()
284 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) &= in intel_vgpu_reset_mmio()
286 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) |= in intel_vgpu_reset_mmio()
289 vgpu_vreg_t(vgpu, SKL_FUSE_STATUS) |= in intel_vgpu_reset_mmio()