Lines Matching refs:_MMIO
63 #define PCH_PP_STATUS _MMIO(0xc7200)
64 #define PCH_PP_CONTROL _MMIO(0xc7204)
65 #define PCH_PP_ON_DELAYS _MMIO(0xc7208)
66 #define PCH_PP_OFF_DELAYS _MMIO(0xc720c)
67 #define PCH_PP_DIVISOR _MMIO(0xc7210)
724 _MMIO(0xd80),
731 _MMIO(0x2690),
732 _MMIO(0x2694),
733 _MMIO(0x2698),
734 _MMIO(0x2754),
735 _MMIO(0x28a0),
736 _MMIO(0x4de0),
737 _MMIO(0x4de4),
738 _MMIO(0x4dfc),
740 _MMIO(0x7014),
743 _MMIO(0x7700),
744 _MMIO(0x7704),
745 _MMIO(0x7708),
746 _MMIO(0x770c),
747 _MMIO(0x83a8),
748 _MMIO(0xb110),
749 _MMIO(0xb118),
750 _MMIO(0xe100),
751 _MMIO(0xe18c),
752 _MMIO(0xe48c),
753 _MMIO(0xe5f4),
754 _MMIO(0x64844),
1967 intel_uncore_read(gvt->gt->uncore, _MMIO(offset)); in mmio_read_from_hw()
2205 #define RING_REG(base) _MMIO((base) + 0x28) in init_generic_mmio_info()
2209 #define RING_REG(base) _MMIO((base) + 0x134) in init_generic_mmio_info()
2213 #define RING_REG(base) _MMIO((base) + 0x6c) in init_generic_mmio_info()
2218 MMIO_GM_RDR(_MMIO(0x2148), D_ALL, NULL, NULL); in init_generic_mmio_info()
2220 MMIO_GM_RDR(_MMIO(0x12198), D_ALL, NULL, NULL); in init_generic_mmio_info()
2229 #define RING_REG(base) _MMIO((base) + 0x29c) in init_generic_mmio_info()
2249 MMIO_DFH(_MMIO(0x2124), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2251 MMIO_DFH(_MMIO(0x20dc), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2253 MMIO_DFH(_MMIO(0x2088), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2256 MMIO_DFH(_MMIO(0x2470), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2262 MMIO_DFH(_MMIO(0x9030), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2263 MMIO_DFH(_MMIO(0x20a0), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2264 MMIO_DFH(_MMIO(0x2420), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2265 MMIO_DFH(_MMIO(0x2430), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2266 MMIO_DFH(_MMIO(0x2434), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2267 MMIO_DFH(_MMIO(0x2438), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2268 MMIO_DFH(_MMIO(0x243c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2269 MMIO_DFH(_MMIO(0x7018), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2314 MMIO_DH(_MMIO(_PCH_TRANSACONF), D_ALL, NULL, transconf_mmio_write); in init_generic_mmio_info()
2315 MMIO_DH(_MMIO(_PCH_TRANSBCONF), D_ALL, NULL, transconf_mmio_write); in init_generic_mmio_info()
2327 MMIO_DH(_MMIO(0xe651c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2328 MMIO_DH(_MMIO(0xe661c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2329 MMIO_DH(_MMIO(0xe671c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2330 MMIO_DH(_MMIO(0xe681c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2331 MMIO_DH(_MMIO(0xe6c04), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2332 MMIO_DH(_MMIO(0xe6e1c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2368 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_A), D_ALL, NULL, NULL); in init_generic_mmio_info()
2369 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_B), D_ALL, NULL, NULL); in init_generic_mmio_info()
2370 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_C), D_ALL, NULL, NULL); in init_generic_mmio_info()
2371 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_EDP), D_ALL, NULL, NULL); in init_generic_mmio_info()
2398 MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2399 MMIO_DFH(_MMIO(0x2178), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2400 MMIO_DFH(_MMIO(0x217c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2401 MMIO_DFH(_MMIO(0x12178), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2402 MMIO_DFH(_MMIO(0x1217c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2404 MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL); in init_generic_mmio_info()
2405 MMIO_F(_MMIO(0x5200), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2406 MMIO_F(_MMIO(0x5240), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2407 MMIO_F(_MMIO(0x5280), 16, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2409 MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2410 MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2424 MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2425 MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2426 MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2427 MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2428 MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2429 MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2433 MMIO_DFH(_MMIO(0x2220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2434 MMIO_DFH(_MMIO(0x12220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2435 MMIO_DFH(_MMIO(0x22220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2438 MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2439 MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2440 MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2441 MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2509 #define RING_REG(base) _MMIO((base) + 0xd0) in init_bdw_mmio_info()
2515 #define RING_REG(base) _MMIO((base) + 0x230) in init_bdw_mmio_info()
2519 #define RING_REG(base) _MMIO((base) + 0x234) in init_bdw_mmio_info()
2524 #define RING_REG(base) _MMIO((base) + 0x244) in init_bdw_mmio_info()
2528 #define RING_REG(base) _MMIO((base) + 0x370) in init_bdw_mmio_info()
2532 #define RING_REG(base) _MMIO((base) + 0x3a0) in init_bdw_mmio_info()
2538 #define RING_REG(base) _MMIO((base) + 0x270) in init_bdw_mmio_info()
2552 MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2553 MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2555 MMIO_DFH(_MMIO(0xb100), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2556 MMIO_DFH(_MMIO(0xb10c), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2558 MMIO_F(_MMIO(0x24d0), 48, F_CMD_ACCESS | F_CMD_WRITE_PATCH, 0, 0, in init_bdw_mmio_info()
2561 MMIO_DFH(_MMIO(0x83a4), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2563 MMIO_DFH(_MMIO(0x8430), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2565 MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2566 MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2568 MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2570 MMIO_DFH(_MMIO(0x2248), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2572 MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2573 MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2574 MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2575 MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2576 MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2577 MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2578 MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2579 MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2580 MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2581 MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2735 MMIO_DFH(_MMIO(0x4dfc), D_SKL_PLUS, F_PM_SAVE, in init_skl_mmio_info()
2741 #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4) in init_skl_mmio_info()
2751 MMIO_DFH(_MMIO(0xe4cc), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_skl_mmio_info()
2787 MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2902 block->offset = _MMIO(offset); in handle_mmio_block()
3228 intel_uncore_write(&dev_priv->uncore, _MMIO(offset), vgpu_vreg(vgpu, offset)); in mmio_pm_restore_handler()