153 static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe,  in intel_vgpu_get_stride()  argument
156 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_get_stride()
158 	u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(dev_priv, pipe)) & stride_mask;  in intel_vgpu_get_stride()
189 static int get_active_pipe(struct intel_vgpu *vgpu)  in get_active_pipe()  argument
194 		if (pipe_is_enabled(vgpu, i))  in get_active_pipe()
202  * @vgpu: input vgpu
209 int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_primary_plane()  argument
212 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_decode_primary_plane()
216 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_primary_plane()
220 	val = vgpu_vreg_t(vgpu, DSPCNTR(dev_priv, pipe));  in intel_vgpu_decode_primary_plane()
254 	plane->base = vgpu_vreg_t(vgpu, DSPSURF(dev_priv, pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_primary_plane()
255 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_primary_plane()
258 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_primary_plane()
265 	plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,  in intel_vgpu_decode_primary_plane()
270 	plane->width = (vgpu_vreg_t(vgpu, PIPESRC(dev_priv, pipe)) & _PIPE_H_SRCSZ_MASK) >>  in intel_vgpu_decode_primary_plane()
273 	plane->height = (vgpu_vreg_t(vgpu, PIPESRC(dev_priv, pipe)) &  in intel_vgpu_decode_primary_plane()
277 	val = vgpu_vreg_t(vgpu, DSPTILEOFF(dev_priv, pipe));  in intel_vgpu_decode_primary_plane()
332  * @vgpu: input vgpu
339 int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_cursor_plane()  argument
342 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_decode_cursor_plane()
347 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_cursor_plane()
351 	val = vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe));  in intel_vgpu_decode_cursor_plane()
377 	plane->base = vgpu_vreg_t(vgpu, CURBASE(dev_priv, pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_cursor_plane()
378 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_cursor_plane()
381 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_cursor_plane()
388 	val = vgpu_vreg_t(vgpu, CURPOS(dev_priv, pipe));  in intel_vgpu_decode_cursor_plane()
394 	plane->x_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot));  in intel_vgpu_decode_cursor_plane()
395 	plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot));  in intel_vgpu_decode_cursor_plane()
411  * @vgpu: input vgpu
418 int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_sprite_plane()  argument
426 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_sprite_plane()
430 	val = vgpu_vreg_t(vgpu, SPRCTL(pipe));  in intel_vgpu_decode_sprite_plane()
481 	plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_sprite_plane()
482 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_sprite_plane()
485 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_sprite_plane()
492 	plane->stride = vgpu_vreg_t(vgpu, SPRSTRIDE(pipe)) &  in intel_vgpu_decode_sprite_plane()
495 	val = vgpu_vreg_t(vgpu, SPRSIZE(pipe));  in intel_vgpu_decode_sprite_plane()
503 	val = vgpu_vreg_t(vgpu, SPRPOS(pipe));  in intel_vgpu_decode_sprite_plane()
507 	val = vgpu_vreg_t(vgpu, SPROFFSET(pipe));  in intel_vgpu_decode_sprite_plane()