144 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in gmbus0_mmio_write()
146 	pin_select = vgpu_vreg(vgpu, offset) & _GMBUS_PIN_SEL_MASK;  in gmbus0_mmio_write()
185 	if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {  in gmbus1_mmio_write()
187 			vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;  in gmbus1_mmio_write()
240 			if (gmbus1_bus_cycle(vgpu_vreg(vgpu, offset))  in gmbus1_mmio_write()
274 		vgpu_vreg(vgpu, offset) = wvalue;  in gmbus1_mmio_write()
302 			memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
313 		memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count);  in gmbus3_mmio_read()
314 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
335 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
344 	u32 value = vgpu_vreg(vgpu, offset);  in gmbus2_mmio_read()
346 	if (!(vgpu_vreg(vgpu, offset) & GMBUS_INUSE))  in gmbus2_mmio_read()
347 		vgpu_vreg(vgpu, offset) |= GMBUS_INUSE;  in gmbus2_mmio_read()
358 		vgpu_vreg(vgpu, offset) &= ~GMBUS_INUSE;  in gmbus2_mmio_write()
389 	memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in intel_gvt_i2c_handle_gmbus_read()
423 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
490 		vgpu_vreg(vgpu, offset) = value;  in intel_gvt_i2c_handle_aux_ch_write()
497 	msg = vgpu_vreg(vgpu, offset + 4);  in intel_gvt_i2c_handle_aux_ch_write()
508 	vgpu_vreg(vgpu, offset) =  in intel_gvt_i2c_handle_aux_ch_write()
557 	vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;  in intel_gvt_i2c_handle_aux_ch_write()