52 static unsigned char edid_get_byte(struct intel_vgpu *vgpu)  in edid_get_byte()  argument
54 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in edid_get_byte()
71 	if (intel_vgpu_has_monitor_on_port(vgpu, edid->port)) {  in edid_get_byte()
73 			intel_vgpu_port(vgpu, edid->port)->edid;  in edid_get_byte()
129 static void reset_gmbus_controller(struct intel_vgpu *vgpu)  in reset_gmbus_controller()  argument
131 	vgpu_vreg_t(vgpu, PCH_GMBUS2) = GMBUS_HW_RDY;  in reset_gmbus_controller()
132 	if (!vgpu->display.i2c_edid.edid_available)  in reset_gmbus_controller()
133 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in reset_gmbus_controller()
134 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in reset_gmbus_controller()
138 static int gmbus0_mmio_write(struct intel_vgpu *vgpu,  in gmbus0_mmio_write()  argument
141 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus0_mmio_write()
144 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in gmbus0_mmio_write()
146 	pin_select = vgpu_vreg(vgpu, offset) & _GMBUS_PIN_SEL_MASK;  in gmbus0_mmio_write()
148 	intel_vgpu_init_i2c_edid(vgpu);  in gmbus0_mmio_write()
162 	vgpu->display.i2c_edid.state = I2C_GMBUS;  in gmbus0_mmio_write()
163 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in gmbus0_mmio_write()
165 	vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus0_mmio_write()
166 	vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY | GMBUS_HW_WAIT_PHASE;  in gmbus0_mmio_write()
168 	if (intel_vgpu_has_monitor_on_port(vgpu, port) &&  in gmbus0_mmio_write()
169 			!intel_vgpu_port_is_dp(vgpu, port)) {  in gmbus0_mmio_write()
170 		vgpu->display.i2c_edid.port = port;  in gmbus0_mmio_write()
171 		vgpu->display.i2c_edid.edid_available = true;  in gmbus0_mmio_write()
172 		vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_SATOER;  in gmbus0_mmio_write()
174 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in gmbus0_mmio_write()
178 static int gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus1_mmio_write()  argument
181 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus1_mmio_write()
185 	if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {  in gmbus1_mmio_write()
187 			vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;  in gmbus1_mmio_write()
188 			reset_gmbus_controller(vgpu);  in gmbus1_mmio_write()
201 			vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_INT;  in gmbus1_mmio_write()
202 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY;  in gmbus1_mmio_write()
215 		/* vgpu gmbus only support EDID */  in gmbus1_mmio_write()
220 				"vgpu%d: unsupported gmbus target addr(0x%x)\n"  in gmbus1_mmio_write()
222 					vgpu->id, target_addr);  in gmbus1_mmio_write()
240 			if (gmbus1_bus_cycle(vgpu_vreg(vgpu, offset))  in gmbus1_mmio_write()
242 				intel_vgpu_init_i2c_edid(vgpu);  in gmbus1_mmio_write()
250 				vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus1_mmio_write()
262 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_ACTIVE;  in gmbus1_mmio_write()
274 		vgpu_vreg(vgpu, offset) = wvalue;  in gmbus1_mmio_write()
279 static int gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_write()  argument
282 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus3_mmio_write()
288 static int gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_read()  argument
293 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus3_mmio_read()
300 	if (vgpu_vreg_t(vgpu, PCH_GMBUS1) & GMBUS_SLAVE_READ) {  in gmbus3_mmio_read()
302 			memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
309 			byte_data = edid_get_byte(vgpu);  in gmbus3_mmio_read()
313 		memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count);  in gmbus3_mmio_read()
314 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
328 			intel_vgpu_init_i2c_edid(vgpu);  in gmbus3_mmio_read()
335 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
341 static int gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_read()  argument
344 	u32 value = vgpu_vreg(vgpu, offset);  in gmbus2_mmio_read()
346 	if (!(vgpu_vreg(vgpu, offset) & GMBUS_INUSE))  in gmbus2_mmio_read()
347 		vgpu_vreg(vgpu, offset) |= GMBUS_INUSE;  in gmbus2_mmio_read()
352 static int gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_write()  argument
358 		vgpu_vreg(vgpu, offset) &= ~GMBUS_INUSE;  in gmbus2_mmio_write()
365  * @vgpu: a vGPU
376 int intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_read()  argument
379 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_read()
385 		return gmbus2_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
387 		return gmbus3_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
389 	memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in intel_gvt_i2c_handle_gmbus_read()
395  * @vgpu: a vGPU
406 int intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_write()  argument
409 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_write()
415 		return gmbus0_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
417 		return gmbus1_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
419 		return gmbus2_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
421 		return gmbus3_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
423 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
468  * @vgpu: a vGPU
476 void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_aux_ch_write()  argument
481 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_aux_ch_write()
482 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in intel_gvt_i2c_handle_aux_ch_write()
490 		vgpu_vreg(vgpu, offset) = value;  in intel_gvt_i2c_handle_aux_ch_write()
497 	msg = vgpu_vreg(vgpu, offset + 4);  in intel_gvt_i2c_handle_aux_ch_write()
508 	vgpu_vreg(vgpu, offset) =  in intel_gvt_i2c_handle_aux_ch_write()
515 			intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
522 				intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
527 				if (intel_vgpu_has_monitor_on_port(vgpu,  in intel_gvt_i2c_handle_aux_ch_write()
529 					intel_vgpu_port_is_dp(vgpu, port_idx))  in intel_gvt_i2c_handle_aux_ch_write()
546 			unsigned char val = edid_get_byte(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
557 	vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;  in intel_gvt_i2c_handle_aux_ch_write()
561  * intel_vgpu_init_i2c_edid - initialize vGPU i2c edid emulation
562  * @vgpu: a vGPU
564  * This function is used to initialize vGPU i2c edid emulation stuffs
567 void intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu)  in intel_vgpu_init_i2c_edid()  argument
569 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in intel_vgpu_init_i2c_edid()