Lines Matching refs:R_VCS

430 #define R_VCS	(R_VCS1 | R_VCS2)  macro
433 #define R_ALL (R_RCS | R_VCS | R_BCS | R_VECS)
2594 R_VCS, D_ALL, 0, 12, NULL},
2597 R_VCS, D_ALL, 0, 12, NULL},
2600 R_VCS, D_BDW_PLUS, 0, 12, NULL},
2603 F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
2606 F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL},
2608 {"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
2611 R_VCS, D_ALL, 0, 12, NULL},
2614 R_VCS, D_ALL, 0, 12, NULL},
2617 R_VCS, D_ALL, 0, 12, NULL},
2620 R_VCS, D_ALL, 0, 12, NULL},
2623 R_VCS, D_ALL, 0, 12, NULL},
2626 R_VCS, D_ALL, 0, 12, NULL},
2629 R_VCS, D_ALL, 0, 6, NULL},
2632 R_VCS, D_ALL, 0, 12, NULL},
2635 R_VCS, D_ALL, 0, 12, NULL},
2638 R_VCS, D_ALL, 0, 12, NULL},
2641 R_VCS, D_ALL, 0, 12, NULL},
2644 R_VCS, D_ALL, 0, 12, NULL},
2647 R_VCS, D_ALL, 0, 12, NULL},
2650 R_VCS, D_ALL, 0, 12, NULL},
2652 R_VCS, D_ALL, 0, 12, NULL},
2655 R_VCS, D_ALL, 0, 12, NULL},
2658 R_VCS, D_ALL, ADDR_FIX_1(2), 12, NULL},
2661 R_VCS, D_ALL, 0, 12, NULL},
2664 R_VCS, D_ALL, 0, 12, NULL},
2667 R_VCS, D_ALL, 0, 12, NULL},
2670 R_VCS, D_ALL, 0, 12, NULL},
2673 R_VCS, D_ALL, 0, 12, NULL},
2676 R_VCS, D_ALL, 0, 12, NULL},
2679 R_VCS, D_ALL, 0, 12, NULL},
2682 R_VCS, D_ALL, 0, 12, NULL},
2685 R_VCS, D_ALL, 0, 12, NULL},
2688 R_VCS, D_ALL, 0, 12, NULL},
2691 R_VCS, D_ALL, 0, 12, NULL},
2693 {"MFX_2_6_0_0", OP_MFX_2_6_0_0, F_LEN_VAR, R_VCS, D_ALL,
2696 {"MFX_2_6_0_9", OP_MFX_2_6_0_9, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
2698 {"MFX_2_6_0_8", OP_MFX_2_6_0_8, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
2701 R_VCS, D_ALL, 0, 12, NULL},
2704 R_VCS, D_ALL, 0, 12, NULL},
2707 R_VCS, D_ALL, 0, 12, NULL},