Lines Matching +full:cs +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0
21 return *a - *b; in cmp_u32()
29 atomic_inc(>->rps.num_waiters); in perf_begin()
30 queue_work(gt->i915->unordered_wq, >->rps.work); in perf_begin()
31 flush_work(>->rps.work); in perf_begin()
38 atomic_dec(>->rps.num_waiters); in perf_end()
41 return igt_flush_test(gt->i915); in perf_end()
46 struct drm_i915_private *i915 = engine->i915; in timestamp_reg()
49 return RING_TIMESTAMP_UDW(engine->mmio_base); in timestamp_reg()
51 return RING_TIMESTAMP(engine->mmio_base); in timestamp_reg()
57 rcu_dereference_protected(rq->timeline, in write_timestamp()
60 u32 *cs; in write_timestamp() local
62 cs = intel_ring_begin(rq, 4); in write_timestamp()
63 if (IS_ERR(cs)) in write_timestamp()
64 return PTR_ERR(cs); in write_timestamp()
67 if (GRAPHICS_VER(rq->i915) >= 8) in write_timestamp()
69 *cs++ = cmd; in write_timestamp()
70 *cs++ = i915_mmio_reg_offset(timestamp_reg(rq->engine)); in write_timestamp()
71 *cs++ = tl->hwsp_offset + slot * sizeof(u32); in write_timestamp()
72 *cs++ = 0; in write_timestamp()
74 intel_ring_advance(rq, cs); in write_timestamp()
83 u32 *cs; in create_empty_batch() local
86 obj = i915_gem_object_create_internal(ce->engine->i915, PAGE_SIZE); in create_empty_batch()
90 cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in create_empty_batch()
91 if (IS_ERR(cs)) { in create_empty_batch()
92 err = PTR_ERR(cs); in create_empty_batch()
96 cs[0] = MI_BATCH_BUFFER_END; in create_empty_batch()
100 vma = i915_vma_instance(obj, ce->vm, NULL); in create_empty_batch()
128 sum += a[3]; in trifilter()
141 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in perf_mi_bb_start()
146 struct intel_context *ce = engine->kernel_context; in perf_mi_bb_start()
151 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_bb_start()
183 err = rq->engine->emit_bb_start(rq, in perf_mi_bb_start()
189 err = write_timestamp(rq, 3); in perf_mi_bb_start()
198 err = -EIO; in perf_mi_bb_start()
203 cycles[i] = rq->hwsp_seqno[3] - rq->hwsp_seqno[2]; in perf_mi_bb_start()
211 engine->name, trifilter(cycles)); in perf_mi_bb_start()
214 err = -EIO; in perf_mi_bb_start()
223 u32 *cs; in create_nop_batch() local
226 obj = i915_gem_object_create_internal(ce->engine->i915, SZ_64K); in create_nop_batch()
230 cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in create_nop_batch()
231 if (IS_ERR(cs)) { in create_nop_batch()
232 err = PTR_ERR(cs); in create_nop_batch()
236 memset(cs, 0, SZ_64K); in create_nop_batch()
237 cs[SZ_64K / sizeof(*cs) - 1] = MI_BATCH_BUFFER_END; in create_nop_batch()
241 vma = i915_vma_instance(obj, ce->vm, NULL); in create_nop_batch()
269 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in perf_mi_noop()
274 struct intel_context *ce = engine->kernel_context; in perf_mi_noop()
279 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_noop()
327 err = rq->engine->emit_bb_start(rq, in perf_mi_noop()
333 err = write_timestamp(rq, 3); in perf_mi_noop()
337 err = rq->engine->emit_bb_start(rq, in perf_mi_noop()
353 err = -EIO; in perf_mi_noop()
359 (rq->hwsp_seqno[4] - rq->hwsp_seqno[3]) - in perf_mi_noop()
360 (rq->hwsp_seqno[3] - rq->hwsp_seqno[2]); in perf_mi_noop()
369 engine->name, trifilter(cycles)); in perf_mi_noop()
372 err = -EIO; in perf_mi_noop()
399 u8 ver = info->mmio_bases[j].graphics_ver; in intel_mmio_bases_check()
400 u32 base = info->mmio_bases[j].base; in intel_mmio_bases_check()
405 intel_engine_class_repr(info->class), in intel_mmio_bases_check()
406 info->class, info->instance, in intel_mmio_bases_check()
408 return -EINVAL; in intel_mmio_bases_check()
417 intel_engine_class_repr(info->class), in intel_mmio_bases_check()
418 info->class, info->instance, in intel_mmio_bases_check()
420 return -EINVAL; in intel_mmio_bases_check()
428 intel_engine_class_repr(info->class), in intel_mmio_bases_check()
429 info->instance, in intel_mmio_bases_check()