Lines Matching +full:power +full:- +full:friendly
1 // SPDX-License-Identifier: MIT
18 * independent values of a register per hardware unit (e.g., per-subslice,
19 * per-L3bank, etc.). The specific types of replication that exist vary
20 * per-platform.
32 * fused off or currently powered down due to power gating, the MMIO operation
38 #define HAS_MSLICE_STEERING(i915) (INTEL_INFO(i915)->has_mslice_steering)
62 { 0x00E900, 0x00FFFF }, /* 0xEA00 - OxEFFF is unused */
93 { 0x008140, 0x00815F }, /* SLICE (0x8140-0x814F), DSS (0x8150-0x815F) */
94 { 0x0094D0, 0x00955F }, /* SLICE (0x94D0-0x951F), DSS (0x9520-0x955F) */
98 { 0x00DE80, 0x00E8FF }, /* DSS (0xE000-0xE0FF reserved) */
110 struct drm_i915_private *i915 = gt->i915; in intel_gt_mcr_init()
114 spin_lock_init(>->mcr_lock); in intel_gt_mcr_init()
121 gt->info.mslice_mask = in intel_gt_mcr_init()
122 intel_slicemask_from_xehp_dssmask(gt->info.sseu.subslice_mask, in intel_gt_mcr_init()
124 gt->info.mslice_mask |= in intel_gt_mcr_init()
125 (intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3) & in intel_gt_mcr_init()
128 if (!gt->info.mslice_mask) /* should be impossible! */ in intel_gt_mcr_init()
132 if (MEDIA_VER(i915) >= 13 && gt->type == GT_MEDIA) { in intel_gt_mcr_init()
133 gt->steering_table[OADDRM] = xelpmp_oaddrm_steering_table; in intel_gt_mcr_init()
139 intel_uncore_read(gt->uncore, in intel_gt_mcr_init()
143 intel_uncore_read(gt->uncore, XEHP_FUSE4)); in intel_gt_mcr_init()
150 gt->info.l3bank_mask |= 0x3 << 2 * i; in intel_gt_mcr_init()
152 gt->steering_table[INSTANCE0] = xelpg_instance0_steering_table; in intel_gt_mcr_init()
153 gt->steering_table[L3BANK] = xelpg_l3bank_steering_table; in intel_gt_mcr_init()
154 gt->steering_table[DSS] = xelpg_dss_steering_table; in intel_gt_mcr_init()
156 gt->steering_table[MSLICE] = dg2_mslice_steering_table; in intel_gt_mcr_init()
157 gt->steering_table[LNCF] = dg2_lncf_steering_table; in intel_gt_mcr_init()
165 gt->steering_table[L3BANK] = icl_l3bank_steering_table; in intel_gt_mcr_init()
166 gt->info.l3bank_mask = in intel_gt_mcr_init()
167 ~intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3) & in intel_gt_mcr_init()
169 if (!gt->info.l3bank_mask) /* should be impossible! */ in intel_gt_mcr_init()
176 MISSING_CASE(INTEL_INFO(i915)->platform); in intel_gt_mcr_init()
181 * Although the rest of the driver should use MCR-specific functions to
194 * rw_with_mcr_steering_fw - Access a register with specific MCR steering
211 struct intel_uncore *uncore = gt->uncore; in rw_with_mcr_steering_fw()
214 lockdep_assert_held(>->mcr_lock); in rw_with_mcr_steering_fw()
216 if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 70)) { in rw_with_mcr_steering_fw()
228 } else if (GRAPHICS_VER(uncore->i915) >= 11) { in rw_with_mcr_steering_fw()
271 * For pre-MTL platforms, we need to restore the old value of the in rw_with_mcr_steering_fw()
276 if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 70) && rw_flag == FW_REG_WRITE) in rw_with_mcr_steering_fw()
278 else if (GRAPHICS_VER_FULL(uncore->i915) < IP_VER(12, 70)) in rw_with_mcr_steering_fw()
289 struct intel_uncore *uncore = gt->uncore; in rw_with_mcr_steering()
301 spin_lock(&uncore->lock); in rw_with_mcr_steering()
307 spin_unlock(&uncore->lock); in rw_with_mcr_steering()
314 * intel_gt_mcr_lock - Acquire MCR steering lock
323 * Context: Takes gt->mcr_lock. uncore->lock should *not* be held when this
328 __acquires(>->mcr_lock) in intel_gt_mcr_lock()
333 lockdep_assert_not_held(>->uncore->lock); in intel_gt_mcr_lock()
340 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_lock()
343 * "always on" power domain with respect to RC6. However there in intel_gt_mcr_lock()
344 * are some issues if higher-level platform sleep states are in intel_gt_mcr_lock()
354 intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_GT); in intel_gt_mcr_lock()
356 err = wait_for(intel_uncore_read_fw(gt->uncore, in intel_gt_mcr_lock()
366 spin_lock_irqsave(>->mcr_lock, __flags); in intel_gt_mcr_lock()
375 if (err == -ETIMEDOUT) { in intel_gt_mcr_lock()
377 add_taint_for_CI(gt->i915, TAINT_WARN); /* CI is now unreliable */ in intel_gt_mcr_lock()
382 * intel_gt_mcr_unlock - Release MCR steering lock
388 * Context: Releases gt->mcr_lock
391 __releases(>->mcr_lock) in intel_gt_mcr_unlock()
393 spin_unlock_irqrestore(>->mcr_lock, flags); in intel_gt_mcr_unlock()
395 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_unlock()
396 intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); in intel_gt_mcr_unlock()
398 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_GT); in intel_gt_mcr_unlock()
403 * intel_gt_mcr_lock_sanitize - Sanitize MCR steering lock
418 lockdep_assert_not_held(>->mcr_lock); in intel_gt_mcr_lock_sanitize()
420 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_lock_sanitize()
421 intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); in intel_gt_mcr_lock_sanitize()
425 * intel_gt_mcr_read - read a specific instance of an MCR register
431 * Context: Takes and releases gt->mcr_lock
444 * intel_gt_mcr_unicast_write - write a specific instance of an MCR register
454 * Context: Calls a function that takes and releases gt->mcr_lock
463 * intel_gt_mcr_multicast_write - write a value to all instances of an MCR register
470 * Context: Takes and releases gt->mcr_lock
480 * Ensure we have multicast behavior, just in case some non-i915 agent in intel_gt_mcr_multicast_write()
483 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_multicast_write()
484 intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST); in intel_gt_mcr_multicast_write()
486 intel_uncore_write(gt->uncore, mcr_reg_cast(reg), value); in intel_gt_mcr_multicast_write()
492 * intel_gt_mcr_multicast_write_fw - write a value to all instances of an MCR register
502 * Context: The caller must hold gt->mcr_lock.
506 lockdep_assert_held(>->mcr_lock); in intel_gt_mcr_multicast_write_fw()
509 * Ensure we have multicast behavior, just in case some non-i915 agent in intel_gt_mcr_multicast_write_fw()
512 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_multicast_write_fw()
513 intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST); in intel_gt_mcr_multicast_write_fw()
515 intel_uncore_write_fw(gt->uncore, mcr_reg_cast(reg), value); in intel_gt_mcr_multicast_write_fw()
519 * intel_gt_mcr_multicast_rmw - Performs a multicast RMW operations
525 * Performs a read-modify-write on an MCR register in a multicast manner.
527 * expected to have the same value. The read will target any non-terminated
534 * Context: Calls functions that take and release gt->mcr_lock
549 * reg_needs_read_steering - determine whether a register read requires
559 * steering type, or if the default (subslice-based) steering IDs are suitable
569 if (likely(!gt->steering_table[type])) in reg_needs_read_steering()
573 offset += gt->uncore->gsi_offset; in reg_needs_read_steering()
575 for (entry = gt->steering_table[type]; entry->end; entry++) { in reg_needs_read_steering()
576 if (offset >= entry->start && offset <= entry->end) in reg_needs_read_steering()
584 * get_nonterminated_steering - determines valid IDs for a class of MCR steering
591 * MCR class to a non-terminated instance.
602 *instance = __ffs(gt->info.l3bank_mask); in get_nonterminated_steering()
605 GEM_WARN_ON(!HAS_MSLICE_STEERING(gt->i915)); in get_nonterminated_steering()
606 *group = __ffs(gt->info.mslice_mask); in get_nonterminated_steering()
614 GEM_WARN_ON(!HAS_MSLICE_STEERING(gt->i915)); in get_nonterminated_steering()
615 *group = __ffs(gt->info.mslice_mask) << 1; in get_nonterminated_steering()
619 *group = IS_DG2(gt->i915) ? 1 : 0; in get_nonterminated_steering()
623 dss = intel_sseu_find_first_xehp_dss(>->info.sseu, 0, 0); in get_nonterminated_steering()
630 * will always provide a non-terminated value. in get_nonterminated_steering()
636 if ((VDBOX_MASK(gt) | VEBOX_MASK(gt) | gt->info.sfc_mask) & BIT(0)) in get_nonterminated_steering()
650 * intel_gt_mcr_get_nonterminated_steering - find group/instance values that
651 * will steer a register to a non-terminated instance
675 *group = gt->default_steering.groupid; in intel_gt_mcr_get_nonterminated_steering()
676 *instance = gt->default_steering.instanceid; in intel_gt_mcr_get_nonterminated_steering()
680 * intel_gt_mcr_read_any_fw - reads one instance of an MCR register
684 * Reads a GT MCR register. The read will be steered to a non-terminated
685 * instance (i.e., one that isn't fused off or powered down by power gating).
690 * Context: The caller must hold gt->mcr_lock.
692 * Returns the value from a non-terminated instance of @reg.
699 lockdep_assert_held(>->mcr_lock); in intel_gt_mcr_read_any_fw()
710 return intel_uncore_read_fw(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any_fw()
714 * intel_gt_mcr_read_any - reads one instance of an MCR register
718 * Reads a GT MCR register. The read will be steered to a non-terminated
719 * instance (i.e., one that isn't fused off or powered down by power gating).
721 * Context: Calls a function that takes and releases gt->mcr_lock.
723 * Returns the value from a non-terminated instance of @reg.
739 return intel_uncore_read(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any()
752 if (!gt->steering_table[type]) { in report_steering_type()
765 for (entry = gt->steering_table[type]; entry->end; entry++) in report_steering_type()
766 drm_printf(p, "\t0x%06x - 0x%06x\n", entry->start, entry->end); in report_steering_type()
776 if (GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 70)) in intel_gt_mcr_report_steering()
778 gt->default_steering.groupid, in intel_gt_mcr_report_steering()
779 gt->default_steering.instanceid); in intel_gt_mcr_report_steering()
781 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_report_steering()
783 if (gt->steering_table[i]) in intel_gt_mcr_report_steering()
785 } else if (HAS_MSLICE_STEERING(gt->i915)) { in intel_gt_mcr_report_steering()
792 * intel_gt_mcr_get_ss_steering - returns the group/instance steering for a SS
804 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55)) { in intel_gt_mcr_get_ss_steering()
815 * intel_gt_mcr_wait_for_reg - wait until MCR register matches expected state
832 * This function is basically an MCR-friendly version of
834 * on GAM registers which are a bit special --- although they're MCR registers,
841 * Context: Calls a function that takes and releases gt->mcr_lock
842 * Return: 0 if the register matches the desired condition, or -ETIMEDOUT.
853 lockdep_assert_not_held(>->mcr_lock); in intel_gt_mcr_wait_for_reg()
862 ret = -ETIMEDOUT; in intel_gt_mcr_wait_for_reg()