117 	 *     "The PCU TSC counts 10ns increments; this timestamp  in gen6_read_clock_frequency()
118 	 *      reflects bits 38:3 of the TSC (i.e. 80ns granularity,  in gen6_read_clock_frequency()
127 	 * 63:32 increments every 1000 ns  in gen5_read_clock_frequency()
136 	 * 63:20 increments every 1/4 ns  in g4x_read_clock_frequency()
139 	 * -> 63:32 increments every 1024 ns  in g4x_read_clock_frequency()
220 u64 intel_gt_ns_to_clock_interval(const struct intel_gt *gt, u64 ns)  in intel_gt_ns_to_clock_interval()  argument
222 	return div_u64_roundup(gt->clock_frequency * ns, NSEC_PER_SEC);  in intel_gt_ns_to_clock_interval()
225 u64 intel_gt_ns_to_pm_interval(const struct intel_gt *gt, u64 ns)  in intel_gt_ns_to_pm_interval()  argument
230 	 * Make these a multiple of magic 25 to avoid SNB (eg. Dell XPS  in intel_gt_ns_to_pm_interval()
236 	val = div_u64_roundup(intel_gt_ns_to_clock_interval(gt, ns), 16);  in intel_gt_ns_to_pm_interval()
238 		val = div_u64_roundup(val, 25) * 25;  in intel_gt_ns_to_pm_interval()