337 		intel_de_rmw(display, MIPI_CTRL(display, port), 0, GLK_MIPIIO_ENABLE);  in glk_dsi_enable_io()
340 	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);  in glk_dsi_enable_io()
346 		intel_de_rmw(display, MIPI_CTRL(display, port),  in glk_dsi_enable_io()
352 		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),  in glk_dsi_enable_io()
374 		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),  in glk_dsi_device_ready()
380 	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), 0, GLK_MIPIIO_RESET_RELEASED);  in glk_dsi_device_ready()
394 			if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),  in glk_dsi_device_ready()
407 			intel_de_rmw(display, MIPI_CTRL(display, port), GLK_LP_WAKE, 0);  in glk_dsi_device_ready()
413 		if (intel_de_wait_for_set(display, MIPI_CTRL(display, port),  in glk_dsi_device_ready()
520 		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),  in glk_dsi_enter_low_power_mode()
527 		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),  in glk_dsi_enter_low_power_mode()
541 	intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);  in glk_dsi_disable_mipi_io()
545 		if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port),  in glk_dsi_disable_mipi_io()
552 		intel_de_rmw(display, MIPI_CTRL(display, port), GLK_MIPIIO_ENABLE, 0);  in glk_dsi_disable_mipi_io()
624 				intel_de_rmw(display, MIPI_CTRL(display, port),  in intel_dsi_port_enable()
992 			u32 tmp = intel_de_read(display, MIPI_CTRL(display, port));  in intel_dsi_get_hw_state()
1334 			tmp = intel_de_read(display, MIPI_CTRL(display, PORT_A));  in intel_dsi_prepare()
1336 			intel_de_write(display, MIPI_CTRL(display, PORT_A),  in intel_dsi_prepare()
1340 			tmp = intel_de_read(display, MIPI_CTRL(display, port));  in intel_dsi_prepare()
1342 			intel_de_write(display, MIPI_CTRL(display, port),  in intel_dsi_prepare()
1347 			intel_de_rmw(display, MIPI_CTRL(display, port),  in intel_dsi_prepare()