Lines Matching refs:REG_GENMASK
15 #define MBUS_DBOX_B2B_TRANSACTIONS_MAX_MASK REG_GENMASK(24, 20) /* tgl+ */
17 #define MBUS_DBOX_B2B_TRANSACTIONS_DELAY_MASK REG_GENMASK(19, 17) /* tgl+ */
20 #define MBUS_DBOX_BW_CREDIT_MASK REG_GENMASK(15, 14)
24 #define MBUS_DBOX_B_CREDIT_MASK REG_GENMASK(12, 8)
26 #define MBUS_DBOX_I_CREDIT_MASK REG_GENMASK(7, 5)
28 #define MBUS_DBOX_A_CREDIT_MASK REG_GENMASK(3, 0)
40 #define MBUS_JOIN_PIPE_SELECT_MASK REG_GENMASK(28, 26)
43 #define MBUS_TRANSLATION_THROTTLE_MIN_MASK REG_GENMASK(15, 13)
65 #define DBUF_TRACKER_STATE_SERVICE_MASK REG_GENMASK(23, 19)
67 #define DBUF_MIN_TRACKER_STATE_SERVICE_MASK REG_GENMASK(18, 16) /* ADL-P+ */
73 #define MTL_LATENCY_LEVEL_EVEN_MASK REG_GENMASK(12, 0)
74 #define MTL_LATENCY_LEVEL_ODD_MASK REG_GENMASK(28, 16)
77 #define MTL_LATENCY_QCLK_SAGV REG_GENMASK(12, 0)
80 #define LNL_ADDED_WAKE_TIME_MASK REG_GENMASK(28, 16)
81 #define LNL_PKG_C_LATENCY_MASK REG_GENMASK(12, 0)