631 		if (dbuf_state->slices[pipe] != dbuf_state->slices[for_pipe])  in intel_crtc_dbuf_weights()
667 	dbuf_slice_mask = new_dbuf_state->slices[pipe];  in skl_crtc_allocate_ddb()
684 	if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe] &&  in skl_crtc_allocate_ddb()
707 		    old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe],  in skl_crtc_allocate_ddb()
2483 		enabled_slices |= dbuf_state->slices[pipe];  in intel_dbuf_enabled_slices()
2533 		new_dbuf_state->slices[pipe] =  in skl_compute_ddb()
2537 		if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe])  in skl_compute_ddb()
2989 		u8 slices;  in skl_wm_get_hw_state()  local
3021 		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,  in skl_wm_get_hw_state()
3023 		mbus_offset = mbus_ddb_offset(i915, slices);  in skl_wm_get_hw_state()
3028 		dbuf_state->slices[pipe] =  in skl_wm_get_hw_state()
3034 			    dbuf_state->slices[pipe], dbuf_state->ddb[pipe].start,  in skl_wm_get_hw_state()
3059 		u8 slices;  in skl_dbuf_is_misconfigured()  local
3061 		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,  in skl_dbuf_is_misconfigured()
3063 		if (dbuf_state->slices[crtc->pipe] & ~slices)  in skl_dbuf_is_misconfigured()