Lines Matching refs:_MMIO

12 #define DSS_CTL1				_MMIO(0x67400)
23 #define DSS_CTL2				_MMIO(0x67404)
50 #define DSCA_PICTURE_PARAMETER_SET_0		_MMIO(0x6B200)
51 #define DSCC_PICTURE_PARAMETER_SET_0		_MMIO(0x6BA00)
54 #define DSCA_PPS(pps)				_MMIO(_DSCA_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4)
55 #define DSCC_PPS(pps)				_MMIO(_DSCC_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4)
72 #define  ICL_DSC0_PPS(pipe, pps)		_MMIO(_ICL_DSC0_PPS_0(pipe) + ((pps) * 4))
73 #define  ICL_DSC1_PPS(pipe, pps)		_MMIO(_ICL_DSC1_PPS_0(pipe) + ((pps) * 4))
190 #define DSCA_RC_BUF_THRESH_0			_MMIO(0x6B230)
191 #define DSCA_RC_BUF_THRESH_0_UDW		_MMIO(0x6B230 + 4)
192 #define DSCC_RC_BUF_THRESH_0			_MMIO(0x6BA30)
193 #define DSCC_RC_BUF_THRESH_0_UDW		_MMIO(0x6BA30 + 4)
215 #define DSCA_RC_BUF_THRESH_1			_MMIO(0x6B238)
216 #define DSCA_RC_BUF_THRESH_1_UDW		_MMIO(0x6B238 + 4)
217 #define DSCC_RC_BUF_THRESH_1			_MMIO(0x6BA38)
218 #define DSCC_RC_BUF_THRESH_1_UDW		_MMIO(0x6BA38 + 4)
241 #define DSCA_RC_RANGE_PARAMETERS_0		_MMIO(0x6B240)
242 #define DSCA_RC_RANGE_PARAMETERS_0_UDW		_MMIO(0x6B240 + 4)
243 #define DSCC_RC_RANGE_PARAMETERS_0		_MMIO(0x6BA40)
244 #define DSCC_RC_RANGE_PARAMETERS_0_UDW		_MMIO(0x6BA40 + 4)
269 #define DSCA_RC_RANGE_PARAMETERS_1		_MMIO(0x6B248)
270 #define DSCA_RC_RANGE_PARAMETERS_1_UDW		_MMIO(0x6B248 + 4)
271 #define DSCC_RC_RANGE_PARAMETERS_1		_MMIO(0x6BA48)
272 #define DSCC_RC_RANGE_PARAMETERS_1_UDW		_MMIO(0x6BA48 + 4)
294 #define DSCA_RC_RANGE_PARAMETERS_2		_MMIO(0x6B250)
295 #define DSCA_RC_RANGE_PARAMETERS_2_UDW		_MMIO(0x6B250 + 4)
296 #define DSCC_RC_RANGE_PARAMETERS_2		_MMIO(0x6BA50)
297 #define DSCC_RC_RANGE_PARAMETERS_2_UDW		_MMIO(0x6BA50 + 4)
319 #define DSCA_RC_RANGE_PARAMETERS_3		_MMIO(0x6B258)
320 #define DSCA_RC_RANGE_PARAMETERS_3_UDW		_MMIO(0x6B258 + 4)
321 #define DSCC_RC_RANGE_PARAMETERS_3		_MMIO(0x6BA58)
322 #define DSCC_RC_RANGE_PARAMETERS_3_UDW		_MMIO(0x6BA58 + 4)