Lines Matching refs:REG_BIT

13 #define   DVS_ENABLE			REG_BIT(31)
14 #define   DVS_PIPE_GAMMA_ENABLE		REG_BIT(30)
15 #define   DVS_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(27)
21 #define   DVS_PIPE_CSC_ENABLE		REG_BIT(24)
22 #define   DVS_SOURCE_KEY		REG_BIT(22)
23 #define   DVS_RGB_ORDER_XBGR		REG_BIT(20)
24 #define   DVS_YUV_FORMAT_BT709		REG_BIT(18)
30 #define   DVS_ROTATE_180		REG_BIT(15)
31 #define   DVS_TRICKLE_FEED_DISABLE	REG_BIT(14)
32 #define   DVS_TILED			REG_BIT(10)
33 #define   DVS_DEST_KEY			REG_BIT(2)
95 #define   DVS_SCALE_ENABLE		REG_BIT(31)
100 #define   DVS_VERTICAL_OFFSET_HALF	REG_BIT(28) /* must be enabled below */
101 #define   DVS_VERTICAL_OFFSET_ENABLE	REG_BIT(27)
119 #define   SPRITE_ENABLE				REG_BIT(31)
120 #define   SPRITE_PIPE_GAMMA_ENABLE		REG_BIT(30)
121 #define   SPRITE_YUV_RANGE_CORRECTION_DISABLE	REG_BIT(28)
129 #define   SPRITE_PIPE_CSC_ENABLE		REG_BIT(24)
130 #define   SPRITE_SOURCE_KEY			REG_BIT(22)
131 #define   SPRITE_RGB_ORDER_RGBX			REG_BIT(20) /* only for 888 and 161616 */
132 #define   SPRITE_YUV_TO_RGB_CSC_DISABLE		REG_BIT(19)
133 #define   SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709	REG_BIT(18) /* 0 is BT601 */
139 #define   SPRITE_ROTATE_180			REG_BIT(15)
140 #define   SPRITE_TRICKLE_FEED_DISABLE		REG_BIT(14)
141 #define   SPRITE_PLANE_GAMMA_DISABLE		REG_BIT(13)
142 #define   SPRITE_TILED				REG_BIT(10)
143 #define   SPRITE_DEST_KEY			REG_BIT(2)
205 #define   SPRITE_SCALE_ENABLE			REG_BIT(31)
210 #define   SPRITE_VERTICAL_OFFSET_HALF		REG_BIT(28) /* must be enabled below */
211 #define   SPRITE_VERTICAL_OFFSET_ENABLE		REG_BIT(27)
238 #define   SP_ENABLE			REG_BIT(31)
239 #define   SP_PIPE_GAMMA_ENABLE		REG_BIT(30)
252 #define   SP_ALPHA_PREMULTIPLY		REG_BIT(23) /* CHV pipe B */
253 #define   SP_SOURCE_KEY			REG_BIT(22)
254 #define   SP_YUV_FORMAT_BT709		REG_BIT(18)
260 #define   SP_ROTATE_180			REG_BIT(15)
261 #define   SP_TILED			REG_BIT(10)
262 #define   SP_MIRROR			REG_BIT(8) /* CHV pipe B */
316 #define   SP_CONST_ALPHA_ENABLE		REG_BIT(31)