56 static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in i8xx_pipe_crc_ctl_reg()  argument
59 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in i8xx_pipe_crc_ctl_reg()
60 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i8xx_pipe_crc_ctl_reg()
62 	switch (*source) {  in i8xx_pipe_crc_ctl_reg()
78 				      enum intel_pipe_crc_source *source)  in i9xx_pipe_crc_auto_source()  argument
84 	*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i9xx_pipe_crc_auto_source()
98 			*source = INTEL_PIPE_CRC_SOURCE_TV;  in i9xx_pipe_crc_auto_source()
105 				*source = INTEL_PIPE_CRC_SOURCE_DP_B;  in i9xx_pipe_crc_auto_source()
108 				*source = INTEL_PIPE_CRC_SOURCE_DP_C;  in i9xx_pipe_crc_auto_source()
111 				*source = INTEL_PIPE_CRC_SOURCE_DP_D;  in i9xx_pipe_crc_auto_source()
128 				enum intel_pipe_crc_source *source,  in vlv_pipe_crc_ctl_reg()  argument
133 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in vlv_pipe_crc_ctl_reg()
134 		i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in vlv_pipe_crc_ctl_reg()
136 	switch (*source) {  in vlv_pipe_crc_ctl_reg()
195 				 enum intel_pipe_crc_source *source,  in i9xx_pipe_crc_ctl_reg()  argument
198 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in i9xx_pipe_crc_ctl_reg()
199 		i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in i9xx_pipe_crc_ctl_reg()
201 	switch (*source) {  in i9xx_pipe_crc_ctl_reg()
215 		 * The DP CRC source doesn't work on g4x.  in i9xx_pipe_crc_ctl_reg()
217 		 * the correct CRC source before the port is enabled,  in i9xx_pipe_crc_ctl_reg()
218 		 * and not touching the CRC source bits again until  in i9xx_pipe_crc_ctl_reg()
253 static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in ilk_pipe_crc_ctl_reg()  argument
256 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ilk_pipe_crc_ctl_reg()
257 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ilk_pipe_crc_ctl_reg()
259 	switch (*source) {  in ilk_pipe_crc_ctl_reg()
333 				enum intel_pipe_crc_source *source,  in ivb_pipe_crc_ctl_reg()  argument
336 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ivb_pipe_crc_ctl_reg()
337 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ivb_pipe_crc_ctl_reg()
339 	switch (*source) {  in ivb_pipe_crc_ctl_reg()
361 				enum intel_pipe_crc_source *source,  in skl_pipe_crc_ctl_reg()  argument
364 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in skl_pipe_crc_ctl_reg()
365 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in skl_pipe_crc_ctl_reg()
367 	switch (*source) {  in skl_pipe_crc_ctl_reg()
404 			       enum intel_pipe_crc_source *source, u32 *val)  in get_new_crc_ctl_reg()  argument
407 		return i8xx_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
409 		return i9xx_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
411 		return vlv_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
413 		return ilk_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
415 		return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
417 		return skl_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
446 				 const enum intel_pipe_crc_source source)  in i8xx_crc_source_valid()  argument
448 	switch (source) {  in i8xx_crc_source_valid()
458 				 const enum intel_pipe_crc_source source)  in i9xx_crc_source_valid()  argument
460 	switch (source) {  in i9xx_crc_source_valid()
471 				const enum intel_pipe_crc_source source)  in vlv_crc_source_valid()  argument
473 	switch (source) {  in vlv_crc_source_valid()
486 				const enum intel_pipe_crc_source source)  in ilk_crc_source_valid()  argument
488 	switch (source) {  in ilk_crc_source_valid()
500 				const enum intel_pipe_crc_source source)  in ivb_crc_source_valid()  argument
502 	switch (source) {  in ivb_crc_source_valid()
514 				const enum intel_pipe_crc_source source)  in skl_crc_source_valid()  argument
516 	switch (source) {  in skl_crc_source_valid()
534 			  const enum intel_pipe_crc_source source)  in intel_is_valid_crc_source()  argument
537 		return i8xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
539 		return i9xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
541 		return vlv_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
543 		return ilk_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
545 		return ivb_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
547 		return skl_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
561 	enum intel_pipe_crc_source source;  in intel_crtc_verify_crc_source()  local
563 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_verify_crc_source()
564 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_verify_crc_source()
568 	if (source == INTEL_PIPE_CRC_SOURCE_AUTO ||  in intel_crtc_verify_crc_source()
569 	    intel_is_valid_crc_source(dev_priv, source) == 0) {  in intel_crtc_verify_crc_source()
583 	enum intel_pipe_crc_source source;  in intel_crtc_set_crc_source()  local
590 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_set_crc_source()
591 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_set_crc_source()
603 	enable = source != INTEL_PIPE_CRC_SOURCE_NONE;  in intel_crtc_set_crc_source()
607 	ret = get_new_crc_ctl_reg(dev_priv, pipe, &source, &val);  in intel_crtc_set_crc_source()
611 	pipe_crc->source = source;  in intel_crtc_set_crc_source()
615 	if (!source) {  in intel_crtc_set_crc_source()
641 	if (get_new_crc_ctl_reg(dev_priv, pipe, &pipe_crc->source, &val) < 0)  in intel_crtc_enable_pipe_crc()