Lines Matching +full:4 +full:- +full:temp
1 // SPDX-License-Identifier: MIT
36 * so pipe->transcoder cast is fine here. in assert_fdi_tx()
122 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fdi_link_train()
124 dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state); in intel_fdi_link_train()
128 * intel_fdi_add_affected_crtcs - add CRTCs on FDI affected by other modeset CRTCs
140 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_fdi_add_affected_crtcs()
157 if (!old_crtc_state->fdi_lanes) in intel_fdi_add_affected_crtcs()
161 new_crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in intel_fdi_add_affected_crtcs()
166 if (!old_crtc_state->fdi_lanes) in intel_fdi_add_affected_crtcs()
177 if (crtc_state->hw.enable && crtc_state->has_pch_encoder) in pipe_required_fdi_lanes()
178 return crtc_state->fdi_lanes; in pipe_required_fdi_lanes()
188 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
194 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
196 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
197 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
198 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
200 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
201 return -EINVAL; in ilk_check_fdi_lanes()
205 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
206 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
208 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
209 return -EINVAL; in ilk_check_fdi_lanes()
223 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
233 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
235 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
236 return -EINVAL; in ilk_check_fdi_lanes()
240 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
241 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
243 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
244 return -EINVAL; in ilk_check_fdi_lanes()
254 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
259 return -EINVAL; in ilk_check_fdi_lanes()
274 i915->display.fdi.pll_freq = (fdi_pll_clk + 2) * 10000; in intel_fdi_pll_freq_update()
276 i915->display.fdi.pll_freq = 270000; in intel_fdi_pll_freq_update()
281 drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->display.fdi.pll_freq); in intel_fdi_pll_freq_update()
288 return pipe_config->port_clock; /* SPLL */ in intel_fdi_link_freq()
290 return i915->display.fdi.pll_freq; in intel_fdi_link_freq()
294 * intel_fdi_compute_pipe_bpp - compute pipe bpp limited by max link bpp
299 * link bpp will always match the pipe bpp. This is the case for all non-DP
308 int pipe_bpp = min(crtc_state->pipe_bpp, in intel_fdi_compute_pipe_bpp()
309 fxp_q4_to_int(crtc_state->max_link_bpp_x16)); in intel_fdi_compute_pipe_bpp()
316 crtc_state->pipe_bpp = pipe_bpp; in intel_fdi_compute_pipe_bpp()
324 struct drm_device *dev = crtc->base.dev; in ilk_fdi_compute_config()
326 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in ilk_fdi_compute_config()
338 fdi_dotclock = adjusted_mode->crtc_clock; in ilk_fdi_compute_config()
341 pipe_config->pipe_bpp); in ilk_fdi_compute_config()
343 pipe_config->fdi_lanes = lane; in ilk_fdi_compute_config()
345 intel_link_compute_m_n(fxp_q4_from_int(pipe_config->pipe_bpp), in ilk_fdi_compute_config()
349 &pipe_config->fdi_m_n); in ilk_fdi_compute_config()
359 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in intel_fdi_atomic_check_bw()
363 ret = ilk_check_fdi_lanes(&i915->drm, crtc->pipe, pipe_config, in intel_fdi_atomic_check_bw()
365 if (ret != -EINVAL) in intel_fdi_atomic_check_bw()
372 return ret ? : -EAGAIN; in intel_fdi_atomic_check_bw()
376 * intel_fdi_atomic_check_link - check all modeset FDI link configuration
386 * - 0 if the confugration is valid
387 * - %-EAGAIN, if the configuration is invalid and @limits got updated
390 * - Other negative error, if the configuration is invalid without a
403 if (!crtc_state->has_pch_encoder || in intel_fdi_atomic_check_link()
405 !crtc_state->hw.enable) in intel_fdi_atomic_check_link()
418 u32 temp; in cpt_set_fdi_bc_bifurcation() local
420 temp = intel_de_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
421 if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable) in cpt_set_fdi_bc_bifurcation()
424 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
427 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
431 temp &= ~FDI_BC_BIFURCATION_SELECT; in cpt_set_fdi_bc_bifurcation()
433 temp |= FDI_BC_BIFURCATION_SELECT; in cpt_set_fdi_bc_bifurcation()
435 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
437 intel_de_write(dev_priv, SOUTH_CHICKEN1, temp); in cpt_set_fdi_bc_bifurcation()
443 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ivb_update_fdi_bc_bifurcation()
444 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ivb_update_fdi_bc_bifurcation()
446 switch (crtc->pipe) { in ivb_update_fdi_bc_bifurcation()
450 if (crtc_state->fdi_lanes > 2) in ivb_update_fdi_bc_bifurcation()
461 MISSING_CASE(crtc->pipe); in ivb_update_fdi_bc_bifurcation()
467 struct drm_device *dev = crtc->base.dev; in intel_fdi_normal_train()
469 enum pipe pipe = crtc->pipe; in intel_fdi_normal_train()
471 u32 temp; in intel_fdi_normal_train() local
475 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
477 temp &= ~FDI_LINK_TRAIN_NONE_IVB; in intel_fdi_normal_train()
478 temp |= FDI_LINK_TRAIN_NONE_IVB | FDI_TX_ENHANCE_FRAME_ENABLE; in intel_fdi_normal_train()
480 temp &= ~FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
481 temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE; in intel_fdi_normal_train()
483 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
486 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
488 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in intel_fdi_normal_train()
489 temp |= FDI_LINK_TRAIN_NORMAL_CPT; in intel_fdi_normal_train()
491 temp &= ~FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
492 temp |= FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
494 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE); in intel_fdi_normal_train()
509 struct drm_device *dev = crtc->base.dev; in ilk_fdi_link_train()
511 enum pipe pipe = crtc->pipe; in ilk_fdi_link_train()
513 u32 temp, tries; in ilk_fdi_link_train() local
523 assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder); in ilk_fdi_link_train()
528 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
529 temp &= ~FDI_RX_SYMBOL_LOCK; in ilk_fdi_link_train()
530 temp &= ~FDI_RX_BIT_LOCK; in ilk_fdi_link_train()
531 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
537 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
538 temp &= ~FDI_DP_PORT_WIDTH_MASK; in ilk_fdi_link_train()
539 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ilk_fdi_link_train()
540 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_link_train()
541 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_link_train()
542 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ilk_fdi_link_train()
545 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
546 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_link_train()
547 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_link_train()
548 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ilk_fdi_link_train()
561 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
562 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
564 if ((temp & FDI_RX_BIT_LOCK)) { in ilk_fdi_link_train()
565 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
566 intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK); in ilk_fdi_link_train()
571 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in ilk_fdi_link_train()
583 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
584 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
586 if (temp & FDI_RX_SYMBOL_LOCK) { in ilk_fdi_link_train()
588 temp | FDI_RX_SYMBOL_LOCK); in ilk_fdi_link_train()
589 drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n"); in ilk_fdi_link_train()
594 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in ilk_fdi_link_train()
596 drm_dbg_kms(&dev_priv->drm, "FDI train done\n"); in ilk_fdi_link_train()
611 struct drm_device *dev = crtc->base.dev; in gen6_fdi_link_train()
613 enum pipe pipe = crtc->pipe; in gen6_fdi_link_train()
615 u32 temp, i, retry; in gen6_fdi_link_train() local
627 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
628 temp &= ~FDI_RX_SYMBOL_LOCK; in gen6_fdi_link_train()
629 temp &= ~FDI_RX_BIT_LOCK; in gen6_fdi_link_train()
630 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
637 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
638 temp &= ~FDI_DP_PORT_WIDTH_MASK; in gen6_fdi_link_train()
639 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in gen6_fdi_link_train()
640 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
641 temp |= FDI_LINK_TRAIN_PATTERN_1; in gen6_fdi_link_train()
642 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in gen6_fdi_link_train()
643 /* SNB-B */ in gen6_fdi_link_train()
644 temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B; in gen6_fdi_link_train()
645 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in gen6_fdi_link_train()
651 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
653 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in gen6_fdi_link_train()
654 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in gen6_fdi_link_train()
656 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
657 temp |= FDI_LINK_TRAIN_PATTERN_1; in gen6_fdi_link_train()
659 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in gen6_fdi_link_train()
664 for (i = 0; i < 4; i++) { in gen6_fdi_link_train()
672 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
673 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
674 if (temp & FDI_RX_BIT_LOCK) { in gen6_fdi_link_train()
676 temp | FDI_RX_BIT_LOCK); in gen6_fdi_link_train()
677 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
686 if (i == 4) in gen6_fdi_link_train()
687 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in gen6_fdi_link_train()
691 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
692 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
693 temp |= FDI_LINK_TRAIN_PATTERN_2; in gen6_fdi_link_train()
695 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in gen6_fdi_link_train()
696 /* SNB-B */ in gen6_fdi_link_train()
697 temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B; in gen6_fdi_link_train()
699 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
702 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
704 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in gen6_fdi_link_train()
705 temp |= FDI_LINK_TRAIN_PATTERN_2_CPT; in gen6_fdi_link_train()
707 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
708 temp |= FDI_LINK_TRAIN_PATTERN_2; in gen6_fdi_link_train()
710 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
715 for (i = 0; i < 4; i++) { in gen6_fdi_link_train()
723 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
724 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
725 if (temp & FDI_RX_SYMBOL_LOCK) { in gen6_fdi_link_train()
727 temp | FDI_RX_SYMBOL_LOCK); in gen6_fdi_link_train()
728 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
737 if (i == 4) in gen6_fdi_link_train()
738 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in gen6_fdi_link_train()
740 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in gen6_fdi_link_train()
747 struct drm_device *dev = crtc->base.dev; in ivb_manual_fdi_link_train()
749 enum pipe pipe = crtc->pipe; in ivb_manual_fdi_link_train()
751 u32 temp, i, j; in ivb_manual_fdi_link_train() local
765 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
766 temp &= ~FDI_RX_SYMBOL_LOCK; in ivb_manual_fdi_link_train()
767 temp &= ~FDI_RX_BIT_LOCK; in ivb_manual_fdi_link_train()
768 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
773 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n", in ivb_manual_fdi_link_train()
780 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
781 temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB); in ivb_manual_fdi_link_train()
782 temp &= ~FDI_TX_ENABLE; in ivb_manual_fdi_link_train()
783 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
786 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
787 temp &= ~FDI_LINK_TRAIN_AUTO; in ivb_manual_fdi_link_train()
788 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in ivb_manual_fdi_link_train()
789 temp &= ~FDI_RX_ENABLE; in ivb_manual_fdi_link_train()
790 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
794 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
795 temp &= ~FDI_DP_PORT_WIDTH_MASK; in ivb_manual_fdi_link_train()
796 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ivb_manual_fdi_link_train()
797 temp |= FDI_LINK_TRAIN_PATTERN_1_IVB; in ivb_manual_fdi_link_train()
798 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in ivb_manual_fdi_link_train()
799 temp |= snb_b_fdi_train_param[j/2]; in ivb_manual_fdi_link_train()
800 temp |= FDI_COMPOSITE_SYNC; in ivb_manual_fdi_link_train()
801 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ivb_manual_fdi_link_train()
807 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
808 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in ivb_manual_fdi_link_train()
809 temp |= FDI_COMPOSITE_SYNC; in ivb_manual_fdi_link_train()
810 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ivb_manual_fdi_link_train()
815 for (i = 0; i < 4; i++) { in ivb_manual_fdi_link_train()
817 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
818 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
820 if (temp & FDI_RX_BIT_LOCK || in ivb_manual_fdi_link_train()
823 temp | FDI_RX_BIT_LOCK); in ivb_manual_fdi_link_train()
824 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
831 if (i == 4) { in ivb_manual_fdi_link_train()
832 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
847 for (i = 0; i < 4; i++) { in ivb_manual_fdi_link_train()
849 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
850 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
852 if (temp & FDI_RX_SYMBOL_LOCK || in ivb_manual_fdi_link_train()
855 temp | FDI_RX_SYMBOL_LOCK); in ivb_manual_fdi_link_train()
856 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
863 if (i == 4) in ivb_manual_fdi_link_train()
864 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
869 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in ivb_manual_fdi_link_train()
873 * connection to the PCH-located connectors. For this, it is necessary to train
883 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_fdi_link_train()
884 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_fdi_link_train()
885 u32 temp, i, rx_ctl_val; in hsw_fdi_link_train() local
888 encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_fdi_link_train()
894 * - TP1 to TP2 time with the default value in hsw_fdi_link_train()
895 * - FDI delay to 90h in hsw_fdi_link_train()
906 rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | in hsw_fdi_link_train()
908 FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in hsw_fdi_link_train()
918 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
924 /* Configure DP_TP_CTL with auto-training */ in hsw_fdi_link_train()
937 ((crtc_state->fdi_lanes - 1) << 1) | in hsw_fdi_link_train()
946 /* Enable PCH FDI Receiver with auto-training */ in hsw_fdi_link_train()
962 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
963 if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) { in hsw_fdi_link_train()
964 drm_dbg_kms(&dev_priv->drm, in hsw_fdi_link_train()
973 if (i == n_entries * 2 - 1) { in hsw_fdi_link_train()
974 drm_err(&dev_priv->drm, "FDI link training failed!\n"); in hsw_fdi_link_train()
1008 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_fdi_disable()
1029 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_fdi_pll_enable()
1030 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_pll_enable()
1031 enum pipe pipe = crtc->pipe; in ilk_fdi_pll_enable()
1033 u32 temp; in ilk_fdi_pll_enable() local
1037 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1038 temp &= ~(FDI_DP_PORT_WIDTH_MASK | (0x7 << 16)); in ilk_fdi_pll_enable()
1039 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ilk_fdi_pll_enable()
1040 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1041 intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE); in ilk_fdi_pll_enable()
1053 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1054 if ((temp & FDI_TX_PLL_ENABLE) == 0) { in ilk_fdi_pll_enable()
1055 intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE); in ilk_fdi_pll_enable()
1064 struct drm_device *dev = crtc->base.dev; in ilk_fdi_pll_disable()
1066 enum pipe pipe = crtc->pipe; in ilk_fdi_pll_disable()
1084 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_disable()
1085 enum pipe pipe = crtc->pipe; in ilk_fdi_disable()
1087 u32 temp; in ilk_fdi_disable() local
1094 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1095 temp &= ~(0x7 << 16); in ilk_fdi_disable()
1096 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1097 intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE); in ilk_fdi_disable()
1112 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1114 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in ilk_fdi_disable()
1115 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in ilk_fdi_disable()
1117 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_disable()
1118 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_disable()
1121 temp &= ~(0x07 << 16); in ilk_fdi_disable()
1122 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1123 intel_de_write(dev_priv, reg, temp); in ilk_fdi_disable()
1145 dev_priv->display.funcs.fdi = &ilk_funcs; in intel_fdi_init_hook()
1147 dev_priv->display.funcs.fdi = &gen6_funcs; in intel_fdi_init_hook()
1150 dev_priv->display.funcs.fdi = &ivb_funcs; in intel_fdi_init_hook()