263 	mutex_lock(&i915->display.dpll.lock);  in intel_enable_shared_dpll()
289 	mutex_unlock(&i915->display.dpll.lock);  in intel_enable_shared_dpll()
312 	mutex_lock(&i915->display.dpll.lock);  in intel_disable_shared_dpll()
335 	mutex_unlock(&i915->display.dpll.lock);  in intel_disable_shared_dpll()
537 	hw_state->dpll = val;  in ibx_pch_dpll_get_hw_state()
571 	intel_de_write(i915, PCH_DPLL(id), hw_state->dpll);  in ibx_pch_dpll_enable()
582 	intel_de_write(i915, PCH_DPLL(id), hw_state->dpll);  in ibx_pch_dpll_enable()
649 		   hw_state->dpll,  in ibx_dump_hw_state()
661 	return a->dpll == b->dpll &&  in ibx_compare_hw_state()
723 	if (i915->display.dpll.pch_ssc_use & BIT(id))  in hsw_ddi_wrpll_disable()
739 	if (i915->display.dpll.pch_ssc_use & BIT(id))  in hsw_ddi_spll_disable()
1005 			refclk = i915->display.dpll.ref_clks.nssc;  in hsw_ddi_wrpll_get_freq()
1015 		refclk = i915->display.dpll.ref_clks.ssc;  in hsw_ddi_wrpll_get_freq()
1240 	i915->display.dpll.ref_clks.ssc = 135000;  in hsw_update_dpll_ref_clks()
1243 		i915->display.dpll.ref_clks.nssc = 24000;  in hsw_update_dpll_ref_clks()
1245 		i915->display.dpll.ref_clks.nssc = 135000;  in hsw_update_dpll_ref_clks()
1737 	int ref_clock = i915->display.dpll.ref_clks.nssc;  in skl_ddi_wrpll_get_freq()
1812 				      i915->display.dpll.ref_clks.nssc, &wrpll_params);  in skl_ddi_hdmi_pll_dividers()
1978 	i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref;  in skl_update_dpll_ref_clks()
2238 static const struct dpll bxt_dp_clk_val[] = {
2251 			  struct dpll *clk_div)  in bxt_ddi_hdmi_pll_dividers()
2269 				    struct dpll *clk_div)  in bxt_ddi_dp_pll_dividers()
2282 	chv_calc_dpll_params(i915->display.dpll.ref_clks.nssc, clk_div);  in bxt_ddi_dp_pll_dividers()
2289 				     const struct dpll *clk_div)  in bxt_ddi_set_dpll_hw_state()
2361 	struct dpll clock;  in bxt_ddi_pll_get_freq()
2372 	return chv_calc_dpll_params(i915->display.dpll.ref_clks.nssc, &clock);  in bxt_ddi_pll_get_freq()
2378 	struct dpll clk_div = {};  in bxt_ddi_dp_set_dpll_hw_state()
2389 	struct dpll clk_div = {};  in bxt_ddi_hdmi_set_dpll_hw_state()
2446 	i915->display.dpll.ref_clks.ssc = 100000;  in bxt_update_dpll_ref_clks()
2447 	i915->display.dpll.ref_clks.nssc = 100000;  in bxt_update_dpll_ref_clks()
2604 		 i915->display.dpll.ref_clks.nssc == 38400;  in ehl_combo_pll_div_frac_wa_needed()
2698 		i915->display.dpll.ref_clks.nssc == 24000 ?  in icl_calc_dp_combo_pll()
2721 		switch (i915->display.dpll.ref_clks.nssc) {  in icl_calc_tbt_pll()
2723 			MISSING_CASE(i915->display.dpll.ref_clks.nssc);  in icl_calc_tbt_pll()
2734 		switch (i915->display.dpll.ref_clks.nssc) {  in icl_calc_tbt_pll()
2736 			MISSING_CASE(i915->display.dpll.ref_clks.nssc);  in icl_calc_tbt_pll()
2766 	int ref_clock = i915->display.dpll.ref_clks.nssc;  in icl_wrpll_ref_clock()
2996 	int refclk_khz = i915->display.dpll.ref_clks.nssc;  in icl_calc_mg_pll_state()
3203 	ref_clock = i915->display.dpll.ref_clks.nssc;  in icl_ddi_mg_pll_get_freq()
3585 	if (i915->display.dpll.ref_clks.nssc == 38400) {  in mg_pll_get_hw_state()
4077 	i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref;  in icl_update_dpll_ref_clks()
4308 	mutex_init(&i915->display.dpll.lock);  in intel_shared_dpll_init()
4343 				i >= ARRAY_SIZE(i915->display.dpll.shared_dplls)))  in intel_shared_dpll_init()
4350 		i915->display.dpll.shared_dplls[i].info = &dpll_info[i];  in intel_shared_dpll_init()
4351 		i915->display.dpll.shared_dplls[i].index = i;  in intel_shared_dpll_init()
4354 	i915->display.dpll.mgr = dpll_mgr;  in intel_shared_dpll_init()
4355 	i915->display.dpll.num_shared_dpll = i;  in intel_shared_dpll_init()
4377 	const struct intel_dpll_mgr *dpll_mgr = i915->display.dpll.mgr;  in intel_compute_shared_dplls()
4410 	const struct intel_dpll_mgr *dpll_mgr = i915->display.dpll.mgr;  in intel_reserve_shared_dplls()
4433 	const struct intel_dpll_mgr *dpll_mgr = i915->display.dpll.mgr;  in intel_release_shared_dplls()
4462 	const struct intel_dpll_mgr *dpll_mgr = i915->display.dpll.mgr;  in intel_update_active_dpll()
4530 	if (i915->display.dpll.mgr && i915->display.dpll.mgr->update_ref_clks)  in intel_dpll_update_ref_clks()
4531 		i915->display.dpll.mgr->update_ref_clks(i915);  in intel_dpll_update_ref_clks()
4582 	if (i915->display.dpll.mgr) {  in intel_dpll_dump_hw_state()
4583 		i915->display.dpll.mgr->dump_hw_state(p, dpll_hw_state);  in intel_dpll_dump_hw_state()
4606 	if (i915->display.dpll.mgr) {  in intel_dpll_compare_hw_state()
4607 		return i915->display.dpll.mgr->compare_hw_state(a, b);  in intel_dpll_compare_hw_state()