166 						int min_bpp,  in intel_dp_mst_find_vcpi_slots_for_bpp()  argument
212 		    min_bpp, max_bpp);  in intel_dp_mst_find_vcpi_slots_for_bpp()
223 	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {  in intel_dp_mst_find_vcpi_slots_for_bpp()
351 	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;  in intel_dp_dsc_mst_compute_link_config()  local
362 	min_bpp = limits->pipe.min_bpp;  in intel_dp_dsc_mst_compute_link_config()
368 		    min_bpp, max_bpp);  in intel_dp_dsc_mst_compute_link_config()
383 	if (min_bpp < sink_min_bpp)  in intel_dp_dsc_mst_compute_link_config()
384 		min_bpp = sink_min_bpp;  in intel_dp_dsc_mst_compute_link_config()
551 	limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);  in intel_dp_mst_compute_config_limits()
1441 	const int min_bpp = 18;  in intel_dp_mst_mode_valid_ctx()  local
1474 	mode_rate = intel_dp_link_required(mode->clock, min_bpp);  in intel_dp_mst_mode_valid_ctx()
1499 	    drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {  in intel_dp_mst_mode_valid_ctx()