Lines Matching refs:dmc_id
278 u8 dmc_id; member
373 static bool is_valid_dmc_id(enum intel_dmc_id dmc_id) in is_valid_dmc_id() argument
375 return dmc_id >= DMC_FW_MAIN && dmc_id < DMC_FW_MAX; in is_valid_dmc_id()
378 static bool has_dmc_id_fw(struct drm_i915_private *i915, enum intel_dmc_id dmc_id) in has_dmc_id_fw() argument
382 return dmc && dmc->dmc_info[dmc_id].payload; in has_dmc_id_fw()
422 enum intel_dmc_id dmc_id; in disable_all_event_handlers() local
428 for_each_dmc_id(dmc_id) { in disable_all_event_handlers()
431 if (!has_dmc_id_fw(i915, dmc_id)) in disable_all_event_handlers()
436 DMC_EVT_CTL(i915, dmc_id, handler), in disable_all_event_handlers()
437 DMC_EVT_HTP(i915, dmc_id, handler)); in disable_all_event_handlers()
483 enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe); in intel_dmc_enable_pipe() local
485 if (!is_valid_dmc_id(dmc_id) || !has_dmc_id_fw(i915, dmc_id)) in intel_dmc_enable_pipe()
496 enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe); in intel_dmc_disable_pipe() local
498 if (!is_valid_dmc_id(dmc_id) || !has_dmc_id_fw(i915, dmc_id)) in intel_dmc_disable_pipe()
508 enum intel_dmc_id dmc_id, i915_reg_t reg) in is_dmc_evt_ctl_reg() argument
511 u32 start = i915_mmio_reg_offset(DMC_EVT_CTL(i915, dmc_id, 0)); in is_dmc_evt_ctl_reg()
512 u32 end = i915_mmio_reg_offset(DMC_EVT_CTL(i915, dmc_id, DMC_EVENT_HANDLER_COUNT_GEN12)); in is_dmc_evt_ctl_reg()
518 enum intel_dmc_id dmc_id, i915_reg_t reg) in is_dmc_evt_htp_reg() argument
521 u32 start = i915_mmio_reg_offset(DMC_EVT_HTP(i915, dmc_id, 0)); in is_dmc_evt_htp_reg()
522 u32 end = i915_mmio_reg_offset(DMC_EVT_HTP(i915, dmc_id, DMC_EVENT_HANDLER_COUNT_GEN12)); in is_dmc_evt_htp_reg()
528 enum intel_dmc_id dmc_id, in disable_dmc_evt() argument
531 if (!is_dmc_evt_ctl_reg(i915, dmc_id, reg)) in disable_dmc_evt()
535 if (dmc_id != DMC_FW_MAIN) in disable_dmc_evt()
553 enum intel_dmc_id dmc_id, int i) in dmc_mmiodata() argument
555 if (disable_dmc_evt(i915, dmc_id, in dmc_mmiodata()
556 dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_mmiodata()
557 dmc->dmc_info[dmc_id].mmiodata[i])) in dmc_mmiodata()
563 return dmc->dmc_info[dmc_id].mmiodata[i]; in dmc_mmiodata()
578 enum intel_dmc_id dmc_id; in intel_dmc_load_program() local
592 for_each_dmc_id(dmc_id) { in intel_dmc_load_program()
593 for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) { in intel_dmc_load_program()
595 DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i), in intel_dmc_load_program()
596 dmc->dmc_info[dmc_id].payload[i]); in intel_dmc_load_program()
602 for_each_dmc_id(dmc_id) { in intel_dmc_load_program()
603 for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) { in intel_dmc_load_program()
604 intel_de_write(i915, dmc->dmc_info[dmc_id].mmioaddr[i], in intel_dmc_load_program()
605 dmc_mmiodata(i915, dmc, dmc_id, i)); in intel_dmc_load_program()
677 enum intel_dmc_id dmc_id; in dmc_set_fw_offset() local
681 dmc_id = package_ver <= 1 ? DMC_FW_MAIN : fw_info[i].dmc_id; in dmc_set_fw_offset()
683 if (!is_valid_dmc_id(dmc_id)) { in dmc_set_fw_offset()
684 drm_dbg(&i915->drm, "Unsupported firmware id: %u\n", dmc_id); in dmc_set_fw_offset()
692 if (dmc->dmc_info[dmc_id].present) in dmc_set_fw_offset()
696 dmc->dmc_info[dmc_id].present = true; in dmc_set_fw_offset()
697 dmc->dmc_info[dmc_id].dmc_offset = fw_info[i].offset; in dmc_set_fw_offset()
704 int header_ver, enum intel_dmc_id dmc_id) in dmc_mmio_addr_sanity_check() argument
713 } else if (dmc_id == DMC_FW_MAIN) { in dmc_mmio_addr_sanity_check()
720 start_range = TGL_PIPE_MMIO_START(dmc_id); in dmc_mmio_addr_sanity_check()
721 end_range = TGL_PIPE_MMIO_END(dmc_id); in dmc_mmio_addr_sanity_check()
737 size_t rem_size, enum intel_dmc_id dmc_id) in parse_dmc_fw_header() argument
740 struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id]; in parse_dmc_fw_header()
805 dmc_header->header_ver, dmc_id)) { in parse_dmc_fw_header()
810 drm_dbg_kms(&i915->drm, "DMC %d:\n", dmc_id); in parse_dmc_fw_header()
817 is_dmc_evt_ctl_reg(i915, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_CTL)" : in parse_dmc_fw_header()
818 is_dmc_evt_htp_reg(i915, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_HTP)" : "", in parse_dmc_fw_header()
819 disable_dmc_evt(i915, dmc_id, dmc_info->mmioaddr[i], in parse_dmc_fw_header()
940 enum intel_dmc_id dmc_id; in parse_dmc_fw() local
963 for_each_dmc_id(dmc_id) { in parse_dmc_fw()
964 if (!dmc->dmc_info[dmc_id].present) in parse_dmc_fw()
967 offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4; in parse_dmc_fw()
974 parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, dmc_id); in parse_dmc_fw()
1170 enum intel_dmc_id dmc_id; in intel_dmc_fini() local
1179 for_each_dmc_id(dmc_id) in intel_dmc_fini()
1180 kfree(dmc->dmc_info[dmc_id].payload); in intel_dmc_fini()