55 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)  in icl_get_procmon_ref_values()  argument
59 	val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy));  in icl_get_procmon_ref_values()
78 				       enum phy phy)  in icl_set_procmon_ref_values()  argument
82 	procmon = icl_get_procmon_ref_values(dev_priv, phy);  in icl_set_procmon_ref_values()
84 	intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy),  in icl_set_procmon_ref_values()
87 	intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9);  in icl_set_procmon_ref_values()
88 	intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10);  in icl_set_procmon_ref_values()
92 			  enum phy phy, i915_reg_t reg, u32 mask,  in check_phy_reg()  argument
101 			phy_name(phy),  in check_phy_reg()
110 					  enum phy phy)  in icl_verify_procmon_ref_values()  argument
115 	procmon = icl_get_procmon_ref_values(dev_priv, phy);  in icl_verify_procmon_ref_values()
117 	ret = check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW1(phy),  in icl_verify_procmon_ref_values()
119 	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW9(phy),  in icl_verify_procmon_ref_values()
121 	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW10(phy),  in icl_verify_procmon_ref_values()
127 static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)  in has_phy_misc()  argument
139 		return phy == PHY_A;  in has_phy_misc()
143 		return phy < PHY_C;  in has_phy_misc()
149 				  enum phy phy)  in icl_combo_phy_enabled()  argument
152 	if (!has_phy_misc(dev_priv, phy))  in icl_combo_phy_enabled()
153 		return intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT;  in icl_combo_phy_enabled()
155 		return !(intel_de_read(dev_priv, ICL_PHY_MISC(phy)) &  in icl_combo_phy_enabled()
157 			(intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT);  in icl_combo_phy_enabled()
189 static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy)  in phy_is_master()  argument
207 	if (phy == PHY_A)  in phy_is_master()
210 		return phy == PHY_D;  in phy_is_master()
212 		return phy == PHY_C;  in phy_is_master()
218 				       enum phy phy)  in icl_combo_phy_verify_state()  argument
223 	if (!icl_combo_phy_enabled(dev_priv, phy))  in icl_combo_phy_verify_state()
227 		ret &= check_phy_reg(dev_priv, phy, ICL_PORT_TX_DW8_LN(0, phy),  in icl_combo_phy_verify_state()
233 		ret &= check_phy_reg(dev_priv, phy, ICL_PORT_PCS_DW1_LN(0, phy),  in icl_combo_phy_verify_state()
237 	ret &= icl_verify_procmon_ref_values(dev_priv, phy);  in icl_combo_phy_verify_state()
239 	if (phy_is_master(dev_priv, phy)) {  in icl_combo_phy_verify_state()
240 		ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),  in icl_combo_phy_verify_state()
247 			ret &= check_phy_reg(dev_priv, phy, ICL_PHY_MISC(phy),  in icl_combo_phy_verify_state()
253 	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_CL_DW5(phy),  in icl_combo_phy_verify_state()
260 				    enum phy phy, bool is_dsi,  in intel_combo_phy_power_up_lanes()  argument
304 	intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy),  in intel_combo_phy_power_up_lanes()
310 	enum phy phy;  in icl_combo_phys_init()  local
312 	for_each_combo_phy(dev_priv, phy) {  in icl_combo_phys_init()
316 		if (icl_combo_phy_verify_state(dev_priv, phy))  in icl_combo_phys_init()
319 		procmon = icl_get_procmon_ref_values(dev_priv, phy);  in icl_combo_phys_init()
323 			phy_name(phy), procmon->name);  in icl_combo_phys_init()
325 		if (!has_phy_misc(dev_priv, phy))  in icl_combo_phys_init()
336 		val = intel_de_read(dev_priv, ICL_PHY_MISC(phy));  in icl_combo_phys_init()
338 		    phy == PHY_A) {  in icl_combo_phys_init()
346 		intel_de_write(dev_priv, ICL_PHY_MISC(phy), val);  in icl_combo_phys_init()
350 			val = intel_de_read(dev_priv, ICL_PORT_TX_DW8_LN(0, phy));  in icl_combo_phys_init()
354 			intel_de_write(dev_priv, ICL_PORT_TX_DW8_GRP(phy), val);  in icl_combo_phys_init()
356 			val = intel_de_read(dev_priv, ICL_PORT_PCS_DW1_LN(0, phy));  in icl_combo_phys_init()
359 			intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val);  in icl_combo_phys_init()
362 		icl_set_procmon_ref_values(dev_priv, phy);  in icl_combo_phys_init()
364 		if (phy_is_master(dev_priv, phy))  in icl_combo_phys_init()
365 			intel_de_rmw(dev_priv, ICL_PORT_COMP_DW8(phy),  in icl_combo_phys_init()
368 		intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);  in icl_combo_phys_init()
369 		intel_de_rmw(dev_priv, ICL_PORT_CL_DW5(phy),  in icl_combo_phys_init()
376 	enum phy phy;  in icl_combo_phys_uninit()  local
378 	for_each_combo_phy_reverse(dev_priv, phy) {  in icl_combo_phys_uninit()
379 		if (phy == PHY_A &&  in icl_combo_phys_uninit()
380 		    !icl_combo_phy_verify_state(dev_priv, phy)) {  in icl_combo_phys_uninit()
389 					    phy_name(phy));  in icl_combo_phys_uninit()
393 					 phy_name(phy));  in icl_combo_phys_uninit()
397 		if (!has_phy_misc(dev_priv, phy))  in icl_combo_phys_uninit()
400 		intel_de_rmw(dev_priv, ICL_PHY_MISC(phy), 0,  in icl_combo_phys_uninit()
404 		intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);  in icl_combo_phys_uninit()