970 			      u32 pri_val);
2297 static u32 ilk_wm_fbc(u32 pri_val, u32 horiz_pixels, u8 cpp)  in ilk_wm_fbc()  argument
2310 	return DIV_ROUND_UP(pri_val * 64, horiz_pixels * cpp) + 2;  in ilk_wm_fbc()
2406 			      u32 pri_val)  in ilk_compute_fbc_wm()  argument
2415 	return ilk_wm_fbc(pri_val, drm_rect_width(&plane_state->uapi.src) >> 16,  in ilk_compute_fbc_wm()
2552 	result->enable = result->pri_val <= max->pri &&  in ilk_validate_wm_level()
2564 		if (result->pri_val > max->pri)  in ilk_validate_wm_level()
2567 				    level, result->pri_val, max->pri);  in ilk_validate_wm_level()
2577 		result->pri_val = min_t(u32, result->pri_val, max->pri);  in ilk_validate_wm_level()
2607 		result->pri_val = ilk_compute_pri_wm(crtc_state, pristate,  in ilk_compute_wm_level()
2609 		result->fbc_val = ilk_compute_fbc_wm(crtc_state, pristate, result->pri_val);  in ilk_compute_wm_level()
2905 		a_wm->pri_val = max(a_wm->pri_val, b_wm->pri_val);  in ilk_compute_intermediate_wm()
2956 		ret_wm->pri_val = max(ret_wm->pri_val, wm->pri_val);  in ilk_merge_wm_level()
3057 			WM_LP_PRIMARY(r->pri_val) |  in ilk_compute_wm_results()
3090 			WM0_PIPE_PRIMARY(r->pri_val) |  in ilk_compute_wm_results()
3377 		active->wm[0].pri_val = REG_FIELD_GET(WM0_PIPE_PRIMARY_MASK, tmp);  in ilk_pipe_wm_get_hw_state()