46  * 0x8086 = Intel Corporation
57 	{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
58 	{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60 	{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
61 	{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 	{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 	{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 	{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 	{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 	{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 	{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 	{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70 	{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
71 	{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 	{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 	{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 	{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 	{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 	{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 	{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 	{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 	{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 	{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 	{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 	{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 	{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 	{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 	{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 	{ 0, }
112 	PSB_WSGX32(0, PSB_CR_SOFT_RESET);  in psb_spank()
133 	if (pg->mmu_gatt_start & 0x0FFFFFFF) {  in psb_do_init()
147 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);  in psb_do_init()
148 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);  in psb_do_init()
162 	return 0;  in psb_do_init()
269 			pci_get_domain_bus_and_slot(domain, 0,  in psb_driver_load()
270 						    PCI_DEVFN(3, 0));  in psb_driver_load()
291 			pci_get_domain_bus_and_slot(domain, 0,  in psb_driver_load()
292 						    PCI_DEVFN(31, 0));  in psb_driver_load()
300 			dev_priv->lpc_gpio_base &= 0xffc0;  in psb_driver_load()
302 				DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",  in psb_driver_load()
339 	dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);  in psb_driver_load()
343 	dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);  in psb_driver_load()
355 					  pg->stolen_size >> PAGE_SHIFT, 0);  in psb_driver_load()
357 	psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);  in psb_driver_load()
360 	PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);  in psb_driver_load()
361 	PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);  in psb_driver_load()
374 	dev_priv->vdc_irq_mask = 0;  in psb_driver_load()
375 	dev_priv->pipestat[0] = 0;  in psb_driver_load()
376 	dev_priv->pipestat[1] = 0;  in psb_driver_load()
377 	dev_priv->pipestat[2] = 0;  in psb_driver_load()
379 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);  in psb_driver_load()
380 	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);  in psb_driver_load()
381 	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);  in psb_driver_load()
386 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */  in psb_driver_load()
399 			if (ret == 0)  in psb_driver_load()
437 	resource_size_t base = 0;  in gma_remove_conflicting_framebuffers()
480 	return 0;  in psb_pci_probe()