35 #define HDMI_READ(reg)		readl(hdmi_dev->regs + (reg))
36 #define HDMI_WRITE(reg, val)	writel(val, hdmi_dev->regs + (reg))
45 #define HDMI_INTR_I2C_ERROR	(1 << 4)
79 	u32 temp;  in hdmi_i2c_irq_enable()  local
81 	temp = HDMI_READ(HDMI_HICR);  in hdmi_i2c_irq_enable()
82 	temp |= (HDMI_INTR_I2C_ERROR | HDMI_INTR_I2C_FULL | HDMI_INTR_I2C_DONE);  in hdmi_i2c_irq_enable()
83 	HDMI_WRITE(HDMI_HICR, temp);  in hdmi_i2c_irq_enable()
96 	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;  in xfer_read()
97 	u32 temp;  in xfer_read()  local
99 	i2c_dev->status = I2C_STAT_INIT;  in xfer_read()
100 	i2c_dev->msg = pmsg;  in xfer_read()
101 	i2c_dev->buf_offset = 0;  in xfer_read()
102 	reinit_completion(&i2c_dev->complete);  in xfer_read()
105 	temp = ((pmsg->len) << 20) | HI2C_EDID_READ | HI2C_ENABLE_TRANSACTION;  in xfer_read()
106 	HDMI_WRITE(HDMI_HI2CHCR, temp);  in xfer_read()
109 	while (i2c_dev->status != I2C_TRANSACTION_DONE)  in xfer_read()
110 		wait_for_completion_interruptible_timeout(&i2c_dev->complete,  in xfer_read()
129 	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;  in oaktrail_hdmi_i2c_access()
132 	mutex_lock(&i2c_dev->i2c_lock);  in oaktrail_hdmi_i2c_access()
140 		if (pmsg->len && pmsg->buf) {  in oaktrail_hdmi_i2c_access()
141 			if (pmsg->flags & I2C_M_RD)  in oaktrail_hdmi_i2c_access()
152 	mutex_unlock(&i2c_dev->i2c_lock);  in oaktrail_hdmi_i2c_access()
176 	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;  in hdmi_i2c_read()
177 	struct i2c_msg *msg = i2c_dev->msg;  in hdmi_i2c_read()
178 	u8 *buf = msg->buf;  in hdmi_i2c_read()
179 	u32 temp;  in hdmi_i2c_read()  local
182 	offset = i2c_dev->buf_offset;  in hdmi_i2c_read()
184 		temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4));  in hdmi_i2c_read()
185 		memcpy(buf + (offset + i * 4), &temp, 4);  in hdmi_i2c_read()
187 	i2c_dev->buf_offset += (0x10 * 4);  in hdmi_i2c_read()
190 	temp = HDMI_READ(HDMI_HISR);  in hdmi_i2c_read()
191 	HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_FULL);  in hdmi_i2c_read()
195 	temp = HDMI_READ(HDMI_HI2CHCR);  in hdmi_i2c_read()
196 	HDMI_WRITE(HDMI_HI2CHCR, temp | HI2C_READ_CONTINUE);  in hdmi_i2c_read()
199 	i2c_dev->status = I2C_READ_DONE;  in hdmi_i2c_read()
205 	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;  in hdmi_i2c_transaction_done()
206 	u32 temp;  in hdmi_i2c_transaction_done()  local
209 	temp = HDMI_READ(HDMI_HISR);  in hdmi_i2c_transaction_done()
210 	HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_DONE);  in hdmi_i2c_transaction_done()
214 	temp = HDMI_READ(HDMI_HI2CHCR);  in hdmi_i2c_transaction_done()
215 	HDMI_WRITE(HDMI_HI2CHCR, temp & ~HI2C_ENABLE_TRANSACTION);  in hdmi_i2c_transaction_done()
218 	i2c_dev->status = I2C_TRANSACTION_DONE;  in hdmi_i2c_transaction_done()
225 	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;  in oaktrail_hdmi_i2c_handler()
241 	complete(&i2c_dev->complete);  in oaktrail_hdmi_i2c_handler()
255 	u32 temp;  in oaktrail_hdmi_i2c_gpio_fix()  local
263 	temp = readl(base + 0x44);  in oaktrail_hdmi_i2c_gpio_fix()
264 	DRM_DEBUG_DRIVER("old gpio val %x\n", temp);  in oaktrail_hdmi_i2c_gpio_fix()
265 	writel((temp | 0x00000a00), (base +  0x44));  in oaktrail_hdmi_i2c_gpio_fix()
266 	temp = readl(base + 0x44);  in oaktrail_hdmi_i2c_gpio_fix()
267 	DRM_DEBUG_DRIVER("new gpio val %x\n", temp);  in oaktrail_hdmi_i2c_gpio_fix()
282 		return -ENOMEM;  in oaktrail_hdmi_i2c_init()
284 	i2c_dev->adap = &oaktrail_hdmi_i2c_adapter;  in oaktrail_hdmi_i2c_init()
285 	i2c_dev->status = I2C_STAT_INIT;  in oaktrail_hdmi_i2c_init()
286 	init_completion(&i2c_dev->complete);  in oaktrail_hdmi_i2c_init()
287 	mutex_init(&i2c_dev->i2c_lock);  in oaktrail_hdmi_i2c_init()
289 	hdmi_dev->i2c_dev = i2c_dev;  in oaktrail_hdmi_i2c_init()
295 	ret = request_irq(dev->irq, oaktrail_hdmi_i2c_handler, IRQF_SHARED,  in oaktrail_hdmi_i2c_init()
312 	free_irq(dev->irq, hdmi_dev);  in oaktrail_hdmi_i2c_init()
327 	i2c_dev = hdmi_dev->i2c_dev;  in oaktrail_hdmi_i2c_exit()
329 	free_irq(dev->irq, hdmi_dev);  in oaktrail_hdmi_i2c_exit()