191 		specs[0] = gpu_read(gpu, VIVS_HI_CHIP_SPECS);  in etnaviv_hw_specs()
192 		specs[1] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_2);  in etnaviv_hw_specs()
193 		specs[2] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_3);  in etnaviv_hw_specs()
194 		specs[3] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_4);  in etnaviv_hw_specs()
338 	chipIdentity = gpu_read(gpu, VIVS_HI_CHIP_IDENTITY);  in etnaviv_hw_identify()
346 		u32 chipDate = gpu_read(gpu, VIVS_HI_CHIP_DATE);  in etnaviv_hw_identify()
348 		gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL);  in etnaviv_hw_identify()
349 		gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV);  in etnaviv_hw_identify()
350 		gpu->identity.customer_id = gpu_read(gpu, VIVS_HI_CHIP_CUSTOMER_ID);  in etnaviv_hw_identify()
357 			gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID);  in etnaviv_hw_identify()
358 			gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID);  in etnaviv_hw_identify()
374 			u32 chipTime = gpu_read(gpu, VIVS_HI_CHIP_TIME);  in etnaviv_hw_identify()
415 	gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE);  in etnaviv_hw_identify()
444 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_0);  in etnaviv_hw_identify()
449 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_1);  in etnaviv_hw_identify()
451 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_2);  in etnaviv_hw_identify()
453 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_3);  in etnaviv_hw_identify()
455 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_4);  in etnaviv_hw_identify()
457 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_5);  in etnaviv_hw_identify()
492 		u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in etnaviv_gpu_update_clock()
559 		idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);  in etnaviv_hw_reset()
568 		control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in etnaviv_hw_reset()
586 		idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);  in etnaviv_hw_reset()
587 		control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in etnaviv_hw_reset()
742 	    gpu_read(gpu, VIVS_HI_CHIP_TIME) != 0x2062400) {  in etnaviv_gpu_hw_init()
745 		mc_memory_debug = gpu_read(gpu, VIVS_MC_DEBUG_MEMORY) & ~0xff;  in etnaviv_gpu_hw_init()
768 		u32 bus_config = gpu_read(gpu, VIVS_MC_BUS_CONFIG);  in etnaviv_gpu_hw_init()
777 		u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL);  in etnaviv_gpu_hw_init()
921 	debug->address[0] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);  in verify_dma()
922 	debug->state[0]   = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE);  in verify_dma()
925 		debug->address[1] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);  in verify_dma()
926 		debug->state[1]   = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE);  in verify_dma()
948 	dma_lo = gpu_read(gpu, VIVS_FE_DMA_LOW);  in etnaviv_gpu_debugfs()
949 	dma_hi = gpu_read(gpu, VIVS_FE_DMA_HIGH);  in etnaviv_gpu_debugfs()
950 	axi = gpu_read(gpu, VIVS_HI_AXI_STATUS);  in etnaviv_gpu_debugfs()
951 	idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);  in etnaviv_gpu_debugfs()
1061 		u32 read0 = gpu_read(gpu, VIVS_MC_DEBUG_READ0);  in etnaviv_gpu_debugfs()
1062 		u32 read1 = gpu_read(gpu, VIVS_MC_DEBUG_READ1);  in etnaviv_gpu_debugfs()
1063 		u32 write = gpu_read(gpu, VIVS_MC_DEBUG_WRITE);  in etnaviv_gpu_debugfs()
1339 	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in sync_point_perfmon_sample_pre()
1362 	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in sync_point_perfmon_sample_post()
1445 	u32 addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);  in sync_point_worker()
1517 	status = gpu_read(gpu, status_reg);  in dump_mmu_fault()
1539 				    i, reason, gpu_read(gpu, address_reg));  in dump_mmu_fault()
1548 	u32 intr = gpu_read(gpu, VIVS_HI_INTR_ACKNOWLEDGE);  in irq_handler()
1659 		u32 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);  in etnaviv_gpu_wait_idle()
1948 	idle = gpu_read(gpu, VIVS_HI_IDLE_STATE) & mask;  in etnaviv_gpu_rpm_suspend()