Lines Matching +full:0 +full:x4301
152 *value = ~0ULL; in etnaviv_gpu_get_param()
172 return 0; in etnaviv_gpu_get_param()
191 specs[0] = gpu_read(gpu, VIVS_HI_CHIP_SPECS); in etnaviv_hw_specs()
196 gpu->identity.stream_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
198 gpu->identity.register_max = etnaviv_field(specs[0], in etnaviv_hw_specs()
200 gpu->identity.thread_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
202 gpu->identity.vertex_cache_size = etnaviv_field(specs[0], in etnaviv_hw_specs()
204 gpu->identity.shader_core_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
206 gpu->identity.pixel_pipes = etnaviv_field(specs[0], in etnaviv_hw_specs()
209 etnaviv_field(specs[0], in etnaviv_hw_specs()
230 if (gpu->identity.stream_count == 0) { in etnaviv_hw_specs()
231 if (gpu->identity.model >= 0x1000) in etnaviv_hw_specs()
256 if (gpu->identity.vertex_cache_size == 0) in etnaviv_hw_specs()
259 if (gpu->identity.shader_core_count == 0) { in etnaviv_hw_specs()
260 if (gpu->identity.model >= 0x1000) in etnaviv_hw_specs()
266 if (gpu->identity.pixel_pipes == 0) in etnaviv_hw_specs()
274 if (gpu->identity.revision < 0x4000) in etnaviv_hw_specs()
276 else if (gpu->identity.revision < 0x4200) in etnaviv_hw_specs()
285 case 0: in etnaviv_hw_specs()
286 if (etnaviv_is_model_rev(gpu, 0x2000, 0x5108) || in etnaviv_hw_specs()
306 if (gpu->identity.num_constants == 0) in etnaviv_hw_specs()
309 if (gpu->identity.varyings_count == 0) { in etnaviv_hw_specs()
320 if (etnaviv_is_model_rev(gpu, 0x5000, 0x5434) || in etnaviv_hw_specs()
321 etnaviv_is_model_rev(gpu, 0x4000, 0x5222) || in etnaviv_hw_specs()
322 etnaviv_is_model_rev(gpu, 0x4000, 0x5245) || in etnaviv_hw_specs()
323 etnaviv_is_model_rev(gpu, 0x4000, 0x5208) || in etnaviv_hw_specs()
324 etnaviv_is_model_rev(gpu, 0x3000, 0x5435) || in etnaviv_hw_specs()
325 etnaviv_is_model_rev(gpu, 0x2200, 0x5244) || in etnaviv_hw_specs()
326 etnaviv_is_model_rev(gpu, 0x2100, 0x5108) || in etnaviv_hw_specs()
327 etnaviv_is_model_rev(gpu, 0x2000, 0x5108) || in etnaviv_hw_specs()
328 etnaviv_is_model_rev(gpu, 0x1500, 0x5246) || in etnaviv_hw_specs()
329 etnaviv_is_model_rev(gpu, 0x880, 0x5107) || in etnaviv_hw_specs()
330 etnaviv_is_model_rev(gpu, 0x880, 0x5106)) in etnaviv_hw_specs()
341 if (etnaviv_field(chipIdentity, VIVS_HI_CHIP_IDENTITY_FAMILY) == 0x01) { in etnaviv_hw_identify()
353 * Reading these two registers on GC600 rev 0x19 result in a in etnaviv_hw_identify()
356 if (!etnaviv_is_model_rev(gpu, 0x600, 0x19)) { in etnaviv_hw_identify()
367 if ((gpu->identity.model & 0xff00) == 0x0400 && in etnaviv_hw_identify()
369 gpu->identity.model = gpu->identity.model & 0x0400; in etnaviv_hw_identify()
373 if (etnaviv_is_model_rev(gpu, 0x300, 0x2201)) { in etnaviv_hw_identify()
376 if (chipDate == 0x20080814 && chipTime == 0x12051100) { in etnaviv_hw_identify()
381 gpu->identity.revision = 0x1051; in etnaviv_hw_identify()
392 if (etnaviv_is_model_rev(gpu, 0x2000, 0xffff5450)) { in etnaviv_hw_identify()
394 gpu->identity.revision &= 0xffff; in etnaviv_hw_identify()
397 if (etnaviv_is_model_rev(gpu, 0x1000, 0x5037) && (chipDate == 0x20120617)) in etnaviv_hw_identify()
400 if (etnaviv_is_model_rev(gpu, 0x320, 0x5303) && (chipDate == 0x20140511)) in etnaviv_hw_identify()
430 gpu->identity.revision < 0x2000)) { in etnaviv_hw_identify()
436 gpu->identity.minor_features0 = 0; in etnaviv_hw_identify()
437 gpu->identity.minor_features1 = 0; in etnaviv_hw_identify()
438 gpu->identity.minor_features2 = 0; in etnaviv_hw_identify()
439 gpu->identity.minor_features3 = 0; in etnaviv_hw_identify()
440 gpu->identity.minor_features4 = 0; in etnaviv_hw_identify()
441 gpu->identity.minor_features5 = 0; in etnaviv_hw_identify()
505 200UL, 0xffffUL); in etnaviv_gpu_update_clock()
519 u32 pulse_eater = 0x01590880; in etnaviv_hw_reset()
522 gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, 0x0); in etnaviv_hw_reset()
527 pulse_eater |= BIT(0); in etnaviv_hw_reset()
562 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) { in etnaviv_hw_reset()
571 if (((control & VIVS_HI_CLOCK_CONTROL_IDLE_3D) == 0) || in etnaviv_hw_reset()
572 ((control & VIVS_HI_CLOCK_CONTROL_IDLE_2D) == 0)) { in etnaviv_hw_reset()
606 return 0; in etnaviv_hw_reset()
618 if (gpu->identity.revision == 0x4301 || in etnaviv_gpu_enable_mlcg()
619 gpu->identity.revision == 0x4302) in etnaviv_gpu_enable_mlcg()
636 if (gpu->identity.revision < 0x5000 && in etnaviv_gpu_enable_mlcg()
642 if (gpu->identity.revision < 0x5422) in etnaviv_gpu_enable_mlcg()
646 if (etnaviv_is_model_rev(gpu, 0x4000, 0x5222) || in etnaviv_gpu_enable_mlcg()
647 etnaviv_is_model_rev(gpu, 0x2000, 0x5108) || in etnaviv_gpu_enable_mlcg()
648 etnaviv_is_model_rev(gpu, 0x7000, 0x6202) || in etnaviv_gpu_enable_mlcg()
649 etnaviv_is_model_rev(gpu, 0x7000, 0x6203)) in etnaviv_gpu_enable_mlcg()
653 if (etnaviv_is_model_rev(gpu, 0x7000, 0x6202)) in etnaviv_gpu_enable_mlcg()
658 if (etnaviv_is_model_rev(gpu, 0x8000, 0x7200) || in etnaviv_gpu_enable_mlcg()
659 etnaviv_is_model_rev(gpu, 0x8000, 0x8002) || in etnaviv_gpu_enable_mlcg()
660 etnaviv_is_model_rev(gpu, 0x9200, 0x6304)) in etnaviv_gpu_enable_mlcg()
710 u32 pulse_eater = 0x01590880; in etnaviv_gpu_setup_pulse_eater()
712 if (etnaviv_is_model_rev(gpu, 0x4000, 0x5208) || in etnaviv_gpu_setup_pulse_eater()
713 etnaviv_is_model_rev(gpu, 0x4000, 0x5222)) { in etnaviv_gpu_setup_pulse_eater()
718 if (etnaviv_is_model_rev(gpu, 0x1000, 0x5039) || in etnaviv_gpu_setup_pulse_eater()
719 etnaviv_is_model_rev(gpu, 0x1000, 0x5040)) { in etnaviv_gpu_setup_pulse_eater()
724 if ((gpu->identity.revision > 0x5420) && in etnaviv_gpu_setup_pulse_eater()
740 if ((etnaviv_is_model_rev(gpu, 0x320, 0x5007) || in etnaviv_gpu_hw_init()
741 etnaviv_is_model_rev(gpu, 0x320, 0x5220)) && in etnaviv_gpu_hw_init()
742 gpu_read(gpu, VIVS_HI_CHIP_TIME) != 0x2062400) { in etnaviv_gpu_hw_init()
745 mc_memory_debug = gpu_read(gpu, VIVS_MC_DEBUG_MEMORY) & ~0xff; in etnaviv_gpu_hw_init()
747 if (gpu->identity.revision == 0x5007) in etnaviv_gpu_hw_init()
748 mc_memory_debug |= 0x0c; in etnaviv_gpu_hw_init()
750 mc_memory_debug |= 0x08; in etnaviv_gpu_hw_init()
767 if (etnaviv_is_model_rev(gpu, 0x2000, 0x5108)) { in etnaviv_gpu_hw_init()
772 VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG(0); in etnaviv_gpu_hw_init()
785 gpu_write(gpu, VIVS_HI_INTR_ENBL, ~0U); in etnaviv_gpu_hw_init()
797 if (ret < 0) { in etnaviv_gpu_init()
804 if (gpu->identity.model == 0) { in etnaviv_gpu_init()
810 if (gpu->identity.nn_core_count > 0) in etnaviv_gpu_init()
814 /* Exclude VG cores with FE2.0 */ in etnaviv_gpu_init()
817 dev_info(gpu->dev, "Ignoring GPU with VG and FE2.0\n"); in etnaviv_gpu_init()
864 * On MC1.0 cores the linear window offset is ignored by the TS engine, in etnaviv_gpu_init()
881 "Need to move linear window on MC1.0, disabling TS\n"); in etnaviv_gpu_init()
890 for (i = 0; i < ARRAY_SIZE(gpu->event); i++) in etnaviv_gpu_init()
901 return 0; in etnaviv_gpu_init()
921 debug->address[0] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); in verify_dma()
922 debug->state[0] = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE); in verify_dma()
924 for (i = 0; i < 500; i++) { in verify_dma()
928 if (debug->address[0] != debug->address[1]) in verify_dma()
931 if (debug->state[0] != debug->state[1]) in verify_dma()
945 if (ret < 0) in etnaviv_gpu_debugfs()
956 seq_printf(m, "\t model: 0x%x\n", gpu->identity.model); in etnaviv_gpu_debugfs()
957 seq_printf(m, "\t revision: 0x%x\n", gpu->identity.revision); in etnaviv_gpu_debugfs()
958 seq_printf(m, "\t product_id: 0x%x\n", gpu->identity.product_id); in etnaviv_gpu_debugfs()
959 seq_printf(m, "\t customer_id: 0x%x\n", gpu->identity.customer_id); in etnaviv_gpu_debugfs()
960 seq_printf(m, "\t eco_id: 0x%x\n", gpu->identity.eco_id); in etnaviv_gpu_debugfs()
963 seq_printf(m, "\t major_features: 0x%08x\n", in etnaviv_gpu_debugfs()
965 seq_printf(m, "\t minor_features0: 0x%08x\n", in etnaviv_gpu_debugfs()
967 seq_printf(m, "\t minor_features1: 0x%08x\n", in etnaviv_gpu_debugfs()
969 seq_printf(m, "\t minor_features2: 0x%08x\n", in etnaviv_gpu_debugfs()
971 seq_printf(m, "\t minor_features3: 0x%08x\n", in etnaviv_gpu_debugfs()
973 seq_printf(m, "\t minor_features4: 0x%08x\n", in etnaviv_gpu_debugfs()
975 seq_printf(m, "\t minor_features5: 0x%08x\n", in etnaviv_gpu_debugfs()
977 seq_printf(m, "\t minor_features6: 0x%08x\n", in etnaviv_gpu_debugfs()
979 seq_printf(m, "\t minor_features7: 0x%08x\n", in etnaviv_gpu_debugfs()
981 seq_printf(m, "\t minor_features8: 0x%08x\n", in etnaviv_gpu_debugfs()
983 seq_printf(m, "\t minor_features9: 0x%08x\n", in etnaviv_gpu_debugfs()
985 seq_printf(m, "\t minor_features10: 0x%08x\n", in etnaviv_gpu_debugfs()
987 seq_printf(m, "\t minor_features11: 0x%08x\n", in etnaviv_gpu_debugfs()
1016 seq_printf(m, "\taxi: 0x%08x\n", axi); in etnaviv_gpu_debugfs()
1017 seq_printf(m, "\tidle: 0x%08x\n", idle); in etnaviv_gpu_debugfs()
1019 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) in etnaviv_gpu_debugfs()
1021 if ((idle & VIVS_HI_IDLE_STATE_DE) == 0) in etnaviv_gpu_debugfs()
1023 if ((idle & VIVS_HI_IDLE_STATE_PE) == 0) in etnaviv_gpu_debugfs()
1025 if ((idle & VIVS_HI_IDLE_STATE_SH) == 0) in etnaviv_gpu_debugfs()
1027 if ((idle & VIVS_HI_IDLE_STATE_PA) == 0) in etnaviv_gpu_debugfs()
1029 if ((idle & VIVS_HI_IDLE_STATE_SE) == 0) in etnaviv_gpu_debugfs()
1031 if ((idle & VIVS_HI_IDLE_STATE_RA) == 0) in etnaviv_gpu_debugfs()
1033 if ((idle & VIVS_HI_IDLE_STATE_TX) == 0) in etnaviv_gpu_debugfs()
1035 if ((idle & VIVS_HI_IDLE_STATE_VG) == 0) in etnaviv_gpu_debugfs()
1037 if ((idle & VIVS_HI_IDLE_STATE_IM) == 0) in etnaviv_gpu_debugfs()
1039 if ((idle & VIVS_HI_IDLE_STATE_FP) == 0) in etnaviv_gpu_debugfs()
1041 if ((idle & VIVS_HI_IDLE_STATE_TS) == 0) in etnaviv_gpu_debugfs()
1043 if ((idle & VIVS_HI_IDLE_STATE_BL) == 0) in etnaviv_gpu_debugfs()
1045 if ((idle & VIVS_HI_IDLE_STATE_ASYNCFE) == 0) in etnaviv_gpu_debugfs()
1047 if ((idle & VIVS_HI_IDLE_STATE_MC) == 0) in etnaviv_gpu_debugfs()
1049 if ((idle & VIVS_HI_IDLE_STATE_PPA) == 0) in etnaviv_gpu_debugfs()
1051 if ((idle & VIVS_HI_IDLE_STATE_WD) == 0) in etnaviv_gpu_debugfs()
1053 if ((idle & VIVS_HI_IDLE_STATE_NN) == 0) in etnaviv_gpu_debugfs()
1055 if ((idle & VIVS_HI_IDLE_STATE_TP) == 0) in etnaviv_gpu_debugfs()
1066 seq_printf(m, "\t read0: 0x%08x\n", read0); in etnaviv_gpu_debugfs()
1067 seq_printf(m, "\t read1: 0x%08x\n", read1); in etnaviv_gpu_debugfs()
1068 seq_printf(m, "\t write: 0x%08x\n", write); in etnaviv_gpu_debugfs()
1073 if (debug.address[0] == debug.address[1] && in etnaviv_gpu_debugfs()
1074 debug.state[0] == debug.state[1]) { in etnaviv_gpu_debugfs()
1076 } else if (debug.address[0] == debug.address[1]) { in etnaviv_gpu_debugfs()
1082 seq_printf(m, "\t address 0: 0x%08x\n", debug.address[0]); in etnaviv_gpu_debugfs()
1083 seq_printf(m, "\t address 1: 0x%08x\n", debug.address[1]); in etnaviv_gpu_debugfs()
1084 seq_printf(m, "\t state 0: 0x%08x\n", debug.state[0]); in etnaviv_gpu_debugfs()
1085 seq_printf(m, "\t state 1: 0x%08x\n", debug.state[1]); in etnaviv_gpu_debugfs()
1086 seq_printf(m, "\t last fetch 64 bit word: 0x%08x 0x%08x\n", in etnaviv_gpu_debugfs()
1089 ret = 0; in etnaviv_gpu_debugfs()
1126 return (s32)(f->gpu->completed_fence - f->base.seqno) >= 0; in etnaviv_fence_signaled()
1168 return (s32)(a - b) > 0; in fence_after()
1179 unsigned i, acquired = 0, rpm_count = 0; in event_alloc()
1182 for (i = 0; i < nr_events; i++) { in event_alloc()
1199 for (i = 0; i < nr_events; i++) { in event_alloc()
1203 memset(&gpu->event[event], 0, sizeof(struct etnaviv_event)); in event_alloc()
1209 for (i = 0; i < nr_events; i++) { in event_alloc()
1216 return 0; in event_alloc()
1219 for (i = 0; i < rpm_count; i++) in event_alloc()
1222 for (i = 0; i < acquired; i++) in event_alloc()
1262 return 0; in etnaviv_gpu_wait_fence_interruptible()
1266 ret = dma_fence_is_signaled(fence) ? 0 : -EBUSY; in etnaviv_gpu_wait_fence_interruptible()
1271 if (ret == 0) in etnaviv_gpu_wait_fence_interruptible()
1274 ret = 0; in etnaviv_gpu_wait_fence_interruptible()
1299 return !is_active(etnaviv_obj) ? 0 : -EBUSY; in etnaviv_gpu_wait_obj_inactive()
1306 if (ret > 0) in etnaviv_gpu_wait_obj_inactive()
1307 return 0; in etnaviv_gpu_wait_obj_inactive()
1320 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample()
1355 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample_post()
1402 for (i = 0; i < nr_events; i++) in etnaviv_gpu_submit()
1422 gpu->event[event[0]].fence = gpu_fence; in etnaviv_gpu_submit()
1425 event[0], &submit->cmdbuf); in etnaviv_gpu_submit()
1477 if (pm_runtime_get_sync(gpu->dev) < 0) in etnaviv_gpu_recover_hang()
1518 dev_err_ratelimited(gpu->dev, "MMU fault status 0x%08x\n", status); in dump_mmu_fault()
1520 for (i = 0; i < 4; i++) { in dump_mmu_fault()
1538 "MMU %d fault (%s) addr 0x%08x\n", in dump_mmu_fault()
1550 if (intr != 0) { in irq_handler()
1556 dev_dbg(gpu->dev, "intr 0x%08x\n", intr); in irq_handler()
1570 while ((event = ffs(intr)) != 0) { in irq_handler()
1592 * - allocate and queue event 0 in irq_handler()
1594 * - event 0 completes, we process it in irq_handler()
1595 * - allocate and queue event 0 in irq_handler()
1596 * - event 1 and event 0 complete in irq_handler()
1597 * we can end up processing event 0 first, then 1. in irq_handler()
1632 return 0; in etnaviv_gpu_clk_enable()
1651 return 0; in etnaviv_gpu_clk_disable()
1662 return 0; in etnaviv_gpu_wait_idle()
1666 "timed out waiting for idle: idle=0x%x\n", in etnaviv_gpu_wait_idle()
1709 return 0; in etnaviv_gpu_hw_resume()
1718 return 0; in etnaviv_gpu_cooling_get_max_state()
1729 return 0; in etnaviv_gpu_cooling_get_cur_state()
1744 return 0; in etnaviv_gpu_cooling_set_cur_state()
1768 gpu->wq = alloc_ordered_workqueue(dev_name(dev), 0); in etnaviv_gpu_bind()
1780 if (ret < 0) in etnaviv_gpu_bind()
1794 return 0; in etnaviv_gpu_bind()
1870 gpu->mmio = devm_platform_ioremap_resource(pdev, 0); in etnaviv_gpu_platform_probe()
1875 gpu->irq = platform_get_irq(pdev, 0); in etnaviv_gpu_platform_probe()
1876 if (gpu->irq < 0) in etnaviv_gpu_platform_probe()
1879 err = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, 0, in etnaviv_gpu_platform_probe()
1922 if (err < 0) { in etnaviv_gpu_platform_probe()
1927 return 0; in etnaviv_gpu_platform_probe()
1950 dev_warn_ratelimited(dev, "GPU not yet idle, mask: 0x%08x\n", in etnaviv_gpu_rpm_suspend()
1980 return 0; in etnaviv_gpu_rpm_resume()