Lines Matching refs:tc
409 static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, in tc_poll_timeout() argument
416 return regmap_read_poll_timeout(tc->regmap, addr, val, in tc_poll_timeout()
421 static int tc_aux_wait_busy(struct tc_data *tc) in tc_aux_wait_busy() argument
423 return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, 100, 100000); in tc_aux_wait_busy()
426 static int tc_aux_write_data(struct tc_data *tc, const void *data, in tc_aux_write_data() argument
434 ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count); in tc_aux_write_data()
441 static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) in tc_aux_read_data() argument
446 ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count); in tc_aux_read_data()
470 struct tc_data *tc = aux_to_tc(aux); in tc_aux_transfer() local
476 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
487 ret = tc_aux_write_data(tc, msg->buffer, size); in tc_aux_transfer()
497 ret = regmap_write(tc->regmap, DP0_AUXADDR, msg->address); in tc_aux_transfer()
501 ret = regmap_write(tc->regmap, DP0_AUXCFG0, tc_auxcfg0(msg, size)); in tc_aux_transfer()
505 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
509 ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &auxstatus); in tc_aux_transfer()
529 return tc_aux_read_data(tc, msg->buffer, size); in tc_aux_transfer()
554 static u32 tc_srcctrl(struct tc_data *tc) in tc_srcctrl() argument
562 if (tc->link.scrambler_dis) in tc_srcctrl()
564 if (tc->link.spread) in tc_srcctrl()
566 if (tc->link.num_lanes == 2) in tc_srcctrl()
568 if (tc->link.rate != 162000) in tc_srcctrl()
573 static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) in tc_pllupdate() argument
577 ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN); in tc_pllupdate()
587 static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock, in tc_pxl_pll_calc() argument
606 if (tc->bridge.type == DRM_MODE_CONNECTOR_DPI) { in tc_pxl_pll_calc()
614 dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, in tc_pxl_pll_calc()
663 dev_err(tc->dev, "Failed to calc clock for %d pixelclock\n", in tc_pxl_pll_calc()
668 dev_dbg(tc->dev, "PLL: got %d, delta %d\n", best_pixelclock, best_delta); in tc_pxl_pll_calc()
669 dev_dbg(tc->dev, "PLL: %d / %d / %d * %d / %d\n", refclk, in tc_pxl_pll_calc()
697 static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) in tc_pxl_pll_en() argument
702 ret = tc_pxl_pll_calc(tc, refclk, pixelclock, NULL, &pxl_pllparam); in tc_pxl_pll_en()
707 ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); in tc_pxl_pll_en()
711 ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam); in tc_pxl_pll_en()
716 return tc_pllupdate(tc, PXL_PLLCTRL); in tc_pxl_pll_en()
719 static int tc_pxl_pll_dis(struct tc_data *tc) in tc_pxl_pll_dis() argument
722 return regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP); in tc_pxl_pll_dis()
725 static int tc_stream_clock_calc(struct tc_data *tc) in tc_stream_clock_calc() argument
742 return regmap_write(tc->regmap, DP0_VIDMNGEN1, 32768); in tc_stream_clock_calc()
745 static int tc_set_syspllparam(struct tc_data *tc) in tc_set_syspllparam() argument
750 rate = clk_get_rate(tc->refclk); in tc_set_syspllparam()
765 dev_err(tc->dev, "Invalid refclk rate: %lu Hz\n", rate); in tc_set_syspllparam()
769 return regmap_write(tc->regmap, SYS_PLLPARAM, pllparam); in tc_set_syspllparam()
772 static int tc_aux_link_setup(struct tc_data *tc) in tc_aux_link_setup() argument
778 ret = tc_set_syspllparam(tc); in tc_aux_link_setup()
782 ret = regmap_write(tc->regmap, DP_PHY_CTRL, in tc_aux_link_setup()
790 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_aux_link_setup()
794 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_aux_link_setup()
798 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 100, 100000); in tc_aux_link_setup()
800 dev_err(tc->dev, "Timeout waiting for PHY to become ready"); in tc_aux_link_setup()
811 ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1); in tc_aux_link_setup()
816 tc->aux.name = "TC358767 AUX i2c adapter"; in tc_aux_link_setup()
817 tc->aux.dev = tc->dev; in tc_aux_link_setup()
818 tc->aux.transfer = tc_aux_transfer; in tc_aux_link_setup()
819 drm_dp_aux_init(&tc->aux); in tc_aux_link_setup()
823 dev_err(tc->dev, "tc_aux_link_setup failed: %d\n", ret); in tc_aux_link_setup()
827 static int tc_get_display_props(struct tc_data *tc) in tc_get_display_props() argument
835 ret = drm_dp_dpcd_read(&tc->aux, DP_DPCD_REV, tc->link.dpcd, in tc_get_display_props()
840 revision = tc->link.dpcd[DP_DPCD_REV]; in tc_get_display_props()
841 rate = drm_dp_max_link_rate(tc->link.dpcd); in tc_get_display_props()
842 num_lanes = drm_dp_max_lane_count(tc->link.dpcd); in tc_get_display_props()
845 dev_dbg(tc->dev, "Falling to 2.7 Gbps rate\n"); in tc_get_display_props()
849 tc->link.rate = rate; in tc_get_display_props()
852 dev_dbg(tc->dev, "Falling to 2 lanes\n"); in tc_get_display_props()
856 tc->link.num_lanes = num_lanes; in tc_get_display_props()
858 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, ®); in tc_get_display_props()
861 tc->link.spread = reg & DP_MAX_DOWNSPREAD_0_5; in tc_get_display_props()
863 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, ®); in tc_get_display_props()
867 tc->link.scrambler_dis = false; in tc_get_display_props()
869 ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, ®); in tc_get_display_props()
872 tc->link.assr = reg & DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; in tc_get_display_props()
874 dev_dbg(tc->dev, "DPCD rev: %d.%d, rate: %s, lanes: %d, framing: %s\n", in tc_get_display_props()
876 (tc->link.rate == 162000) ? "1.62Gbps" : "2.7Gbps", in tc_get_display_props()
877 tc->link.num_lanes, in tc_get_display_props()
878 drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_get_display_props()
880 dev_dbg(tc->dev, "Downspread: %s, scrambler: %s\n", in tc_get_display_props()
881 tc->link.spread ? "0.5%" : "0.0%", in tc_get_display_props()
882 tc->link.scrambler_dis ? "disabled" : "enabled"); in tc_get_display_props()
883 dev_dbg(tc->dev, "Display ASSR: %d, TC358767 ASSR: %d\n", in tc_get_display_props()
884 tc->link.assr, tc->assr); in tc_get_display_props()
889 dev_err(tc->dev, "failed to read DPCD: %d\n", ret); in tc_get_display_props()
893 static int tc_set_common_video_mode(struct tc_data *tc, in tc_set_common_video_mode() argument
904 dev_dbg(tc->dev, "set mode %dx%d\n", in tc_set_common_video_mode()
906 dev_dbg(tc->dev, "H margin %d,%d sync %d\n", in tc_set_common_video_mode()
908 dev_dbg(tc->dev, "V margin %d,%d sync %d\n", in tc_set_common_video_mode()
910 dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal); in tc_set_common_video_mode()
918 ret = regmap_write(tc->regmap, VPCTRL0, in tc_set_common_video_mode()
924 ret = regmap_write(tc->regmap, HTIM01, in tc_set_common_video_mode()
930 ret = regmap_write(tc->regmap, HTIM02, in tc_set_common_video_mode()
936 ret = regmap_write(tc->regmap, VTIM01, in tc_set_common_video_mode()
942 ret = regmap_write(tc->regmap, VTIM02, in tc_set_common_video_mode()
948 ret = regmap_write(tc->regmap, VFUEN0, VFUEN); /* update settings */ in tc_set_common_video_mode()
953 ret = regmap_write(tc->regmap, TSTCTL, in tc_set_common_video_mode()
963 static int tc_set_dpi_video_mode(struct tc_data *tc, in tc_set_dpi_video_mode() argument
968 if (tc->mode.flags & DRM_MODE_FLAG_NHSYNC) in tc_set_dpi_video_mode()
971 if (tc->mode.flags & DRM_MODE_FLAG_NVSYNC) in tc_set_dpi_video_mode()
974 return regmap_write(tc->regmap, POCTRL, value); in tc_set_dpi_video_mode()
977 static int tc_set_edp_video_mode(struct tc_data *tc, in tc_set_edp_video_mode() argument
1001 out_bw = tc->link.num_lanes * tc->link.rate; in tc_set_edp_video_mode()
1006 ret = regmap_write(tc->regmap, DP0_VIDSYNCDELAY, in tc_set_edp_video_mode()
1010 ret = regmap_write(tc->regmap, DP0_TOTALVAL, in tc_set_edp_video_mode()
1016 ret = regmap_write(tc->regmap, DP0_STARTVAL, in tc_set_edp_video_mode()
1022 ret = regmap_write(tc->regmap, DP0_ACTIVEVAL, in tc_set_edp_video_mode()
1037 ret = regmap_write(tc->regmap, DP0_SYNCVAL, dp0_syncval); in tc_set_edp_video_mode()
1049 ret = regmap_write(tc->regmap, DPIPXLFMT, dpipxlfmt); in tc_set_edp_video_mode()
1053 ret = regmap_write(tc->regmap, DP0_MISC, in tc_set_edp_video_mode()
1060 static int tc_wait_link_training(struct tc_data *tc) in tc_wait_link_training() argument
1065 ret = tc_poll_timeout(tc, DP0_LTSTAT, LT_LOOPDONE, in tc_wait_link_training()
1068 dev_err(tc->dev, "Link training timeout waiting for LT_LOOPDONE!\n"); in tc_wait_link_training()
1072 ret = regmap_read(tc->regmap, DP0_LTSTAT, &value); in tc_wait_link_training()
1079 static int tc_main_link_enable(struct tc_data *tc) in tc_main_link_enable() argument
1081 struct drm_dp_aux *aux = &tc->aux; in tc_main_link_enable()
1082 struct device *dev = tc->dev; in tc_main_link_enable()
1088 dev_dbg(tc->dev, "link enable\n"); in tc_main_link_enable()
1090 ret = regmap_read(tc->regmap, DP0CTL, &value); in tc_main_link_enable()
1095 ret = regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_enable()
1100 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1101 tc_srcctrl(tc) | in tc_main_link_enable()
1102 FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) | in tc_main_link_enable()
1103 FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1])); in tc_main_link_enable()
1107 ret = regmap_write(tc->regmap, DP1_SRCCTRL, in tc_main_link_enable()
1108 (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | in tc_main_link_enable()
1109 ((tc->link.rate != 162000) ? DP0_SRCCTRL_BW27 : 0) | in tc_main_link_enable()
1110 FIELD_PREP(DP1_SRCCTRL_PRE, tc->pre_emphasis[1])); in tc_main_link_enable()
1114 ret = tc_set_syspllparam(tc); in tc_main_link_enable()
1120 if (tc->link.num_lanes == 2) in tc_main_link_enable()
1123 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
1128 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_main_link_enable()
1132 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_main_link_enable()
1138 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
1141 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
1143 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 500, 100000); in tc_main_link_enable()
1150 ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); in tc_main_link_enable()
1161 if (tc->assr != tc->link.assr) { in tc_main_link_enable()
1163 tc->assr); in tc_main_link_enable()
1165 tmp[0] = tc->assr; in tc_main_link_enable()
1174 if (tmp[0] != tc->assr) { in tc_main_link_enable()
1176 tc->assr); in tc_main_link_enable()
1178 tc->link.scrambler_dis = true; in tc_main_link_enable()
1183 tmp[0] = drm_dp_link_rate_to_bw_code(tc->link.rate); in tc_main_link_enable()
1184 tmp[1] = tc->link.num_lanes; in tc_main_link_enable()
1186 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_main_link_enable()
1194 tmp[0] = tc->link.spread ? DP_SPREAD_AMP_0_5 : 0x00; in tc_main_link_enable()
1203 FIELD_PREP(DP_TRAIN_PRE_EMPHASIS_MASK, tc->pre_emphasis[0]); in tc_main_link_enable()
1205 FIELD_PREP(DP_TRAIN_PRE_EMPHASIS_MASK, tc->pre_emphasis[1]); in tc_main_link_enable()
1213 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1219 ret = regmap_write(tc->regmap, DP0_LTLOOPCTRL, in tc_main_link_enable()
1226 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1227 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1230 FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) | in tc_main_link_enable()
1231 FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1])); in tc_main_link_enable()
1236 ret = regmap_write(tc->regmap, DP0CTL, in tc_main_link_enable()
1237 (drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_main_link_enable()
1244 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1249 dev_err(tc->dev, "Link training phase 1 failed: %s\n", in tc_main_link_enable()
1257 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1263 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1264 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1267 FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) | in tc_main_link_enable()
1268 FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1])); in tc_main_link_enable()
1273 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1278 dev_err(tc->dev, "Link training phase 2 failed: %s\n", in tc_main_link_enable()
1293 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc) | in tc_main_link_enable()
1295 FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) | in tc_main_link_enable()
1296 FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1])); in tc_main_link_enable()
1302 tmp[0] = tc->link.scrambler_dis ? DP_LINK_SCRAMBLING_DISABLE : 0x00; in tc_main_link_enable()
1317 dev_err(tc->dev, "Lane 0 failed: %x\n", value); in tc_main_link_enable()
1321 if (tc->link.num_lanes == 2) { in tc_main_link_enable()
1325 dev_err(tc->dev, "Lane 1 failed: %x\n", value); in tc_main_link_enable()
1330 dev_err(tc->dev, "Interlane align failed\n"); in tc_main_link_enable()
1347 dev_err(tc->dev, "Failed to read DPCD: %d\n", ret); in tc_main_link_enable()
1350 dev_err(tc->dev, "Failed to write DPCD: %d\n", ret); in tc_main_link_enable()
1354 static int tc_main_link_disable(struct tc_data *tc) in tc_main_link_disable() argument
1358 dev_dbg(tc->dev, "link disable\n"); in tc_main_link_disable()
1360 ret = regmap_write(tc->regmap, DP0_SRCCTRL, 0); in tc_main_link_disable()
1364 ret = regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_disable()
1368 return regmap_update_bits(tc->regmap, DP_PHY_CTRL, in tc_main_link_disable()
1373 static int tc_dsi_rx_enable(struct tc_data *tc) in tc_dsi_rx_enable() argument
1378 regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 5); in tc_dsi_rx_enable()
1379 regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 5); in tc_dsi_rx_enable()
1380 regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 5); in tc_dsi_rx_enable()
1381 regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 5); in tc_dsi_rx_enable()
1382 regmap_write(tc->regmap, PPI_D0S_ATMR, 0); in tc_dsi_rx_enable()
1383 regmap_write(tc->regmap, PPI_D1S_ATMR, 0); in tc_dsi_rx_enable()
1384 regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); in tc_dsi_rx_enable()
1385 regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD); in tc_dsi_rx_enable()
1387 value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) | in tc_dsi_rx_enable()
1389 regmap_write(tc->regmap, PPI_LANEENABLE, value); in tc_dsi_rx_enable()
1390 regmap_write(tc->regmap, DSI_LANEENABLE, value); in tc_dsi_rx_enable()
1398 ret = regmap_write(tc->regmap, SYSCTRL, value); in tc_dsi_rx_enable()
1404 regmap_write(tc->regmap, PPI_STARTPPI, PPI_START_FUNCTION); in tc_dsi_rx_enable()
1405 regmap_write(tc->regmap, DSI_STARTDSI, DSI_RX_START); in tc_dsi_rx_enable()
1410 static int tc_dpi_rx_enable(struct tc_data *tc) in tc_dpi_rx_enable() argument
1420 return regmap_write(tc->regmap, SYSCTRL, value); in tc_dpi_rx_enable()
1423 static int tc_dpi_stream_enable(struct tc_data *tc) in tc_dpi_stream_enable() argument
1427 dev_dbg(tc->dev, "enable video stream\n"); in tc_dpi_stream_enable()
1430 ret = tc_set_syspllparam(tc); in tc_dpi_stream_enable()
1438 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_dpi_stream_enable()
1442 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_dpi_stream_enable()
1447 ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), in tc_dpi_stream_enable()
1448 1000 * tc->mode.clock); in tc_dpi_stream_enable()
1452 ret = tc_set_common_video_mode(tc, &tc->mode); in tc_dpi_stream_enable()
1456 ret = tc_set_dpi_video_mode(tc, &tc->mode); in tc_dpi_stream_enable()
1460 return tc_dsi_rx_enable(tc); in tc_dpi_stream_enable()
1463 static int tc_dpi_stream_disable(struct tc_data *tc) in tc_dpi_stream_disable() argument
1465 dev_dbg(tc->dev, "disable video stream\n"); in tc_dpi_stream_disable()
1467 tc_pxl_pll_dis(tc); in tc_dpi_stream_disable()
1472 static int tc_edp_stream_enable(struct tc_data *tc) in tc_edp_stream_enable() argument
1477 dev_dbg(tc->dev, "enable video stream\n"); in tc_edp_stream_enable()
1490 if (tc->input_connector_dsi || tc_test_pattern) { in tc_edp_stream_enable()
1491 ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), in tc_edp_stream_enable()
1492 1000 * tc->mode.clock); in tc_edp_stream_enable()
1497 ret = tc_set_common_video_mode(tc, &tc->mode); in tc_edp_stream_enable()
1501 ret = tc_set_edp_video_mode(tc, &tc->mode); in tc_edp_stream_enable()
1506 ret = tc_stream_clock_calc(tc); in tc_edp_stream_enable()
1511 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_edp_stream_enable()
1513 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_edp_stream_enable()
1525 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_edp_stream_enable()
1530 if (tc->input_connector_dsi) in tc_edp_stream_enable()
1531 return tc_dsi_rx_enable(tc); in tc_edp_stream_enable()
1533 return tc_dpi_rx_enable(tc); in tc_edp_stream_enable()
1536 static int tc_edp_stream_disable(struct tc_data *tc) in tc_edp_stream_disable() argument
1540 dev_dbg(tc->dev, "disable video stream\n"); in tc_edp_stream_disable()
1542 ret = regmap_update_bits(tc->regmap, DP0CTL, VID_EN, 0); in tc_edp_stream_disable()
1546 tc_pxl_pll_dis(tc); in tc_edp_stream_disable()
1556 struct tc_data *tc = bridge_to_tc(bridge); in tc_dpi_bridge_atomic_enable() local
1559 ret = tc_dpi_stream_enable(tc); in tc_dpi_bridge_atomic_enable()
1561 dev_err(tc->dev, "main link stream start error: %d\n", ret); in tc_dpi_bridge_atomic_enable()
1562 tc_main_link_disable(tc); in tc_dpi_bridge_atomic_enable()
1571 struct tc_data *tc = bridge_to_tc(bridge); in tc_dpi_bridge_atomic_disable() local
1574 ret = tc_dpi_stream_disable(tc); in tc_dpi_bridge_atomic_disable()
1576 dev_err(tc->dev, "main link stream stop error: %d\n", ret); in tc_dpi_bridge_atomic_disable()
1583 struct tc_data *tc = bridge_to_tc(bridge); in tc_edp_bridge_atomic_enable() local
1586 ret = tc_get_display_props(tc); in tc_edp_bridge_atomic_enable()
1588 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_edp_bridge_atomic_enable()
1592 ret = tc_main_link_enable(tc); in tc_edp_bridge_atomic_enable()
1594 dev_err(tc->dev, "main link enable error: %d\n", ret); in tc_edp_bridge_atomic_enable()
1598 ret = tc_edp_stream_enable(tc); in tc_edp_bridge_atomic_enable()
1600 dev_err(tc->dev, "main link stream start error: %d\n", ret); in tc_edp_bridge_atomic_enable()
1601 tc_main_link_disable(tc); in tc_edp_bridge_atomic_enable()
1610 struct tc_data *tc = bridge_to_tc(bridge); in tc_edp_bridge_atomic_disable() local
1613 ret = tc_edp_stream_disable(tc); in tc_edp_bridge_atomic_disable()
1615 dev_err(tc->dev, "main link stream stop error: %d\n", ret); in tc_edp_bridge_atomic_disable()
1617 ret = tc_main_link_disable(tc); in tc_edp_bridge_atomic_disable()
1619 dev_err(tc->dev, "main link disable error: %d\n", ret); in tc_edp_bridge_atomic_disable()
1627 struct tc_data *tc = bridge_to_tc(bridge); in tc_dpi_atomic_check() local
1631 ret = tc_pxl_pll_calc(tc, clk_get_rate(tc->refclk), in tc_dpi_atomic_check()
1651 struct tc_data *tc = bridge_to_tc(bridge); in tc_edp_atomic_check() local
1655 ret = tc_pxl_pll_calc(tc, clk_get_rate(tc->refclk), in tc_edp_atomic_check()
1687 struct tc_data *tc = bridge_to_tc(bridge); in tc_edp_mode_valid() local
1696 avail = tc->link.num_lanes * tc->link.rate; in tc_edp_mode_valid()
1708 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_mode_set() local
1710 drm_mode_copy(&tc->mode, mode); in tc_bridge_mode_set()
1716 struct tc_data *tc = bridge_to_tc(bridge); in tc_edid_read() local
1718 return drm_edid_read_ddc(connector, &tc->aux.ddc); in tc_edid_read()
1723 struct tc_data *tc = connector_to_tc(connector); in tc_connector_get_modes() local
1728 ret = tc_get_display_props(tc); in tc_connector_get_modes()
1730 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_connector_get_modes()
1734 if (tc->panel_bridge) { in tc_connector_get_modes()
1735 num_modes = drm_bridge_get_modes(tc->panel_bridge, connector); in tc_connector_get_modes()
1740 drm_edid = tc_edid_read(&tc->bridge, connector); in tc_connector_get_modes()
1754 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_detect() local
1759 ret = regmap_read(tc->regmap, GPIOI, &val); in tc_bridge_detect()
1763 conn = val & BIT(tc->hpd_pin); in tc_bridge_detect()
1774 struct tc_data *tc = connector_to_tc(connector); in tc_connector_detect() local
1776 if (tc->hpd_pin >= 0) in tc_connector_detect()
1777 return tc_bridge_detect(&tc->bridge); in tc_connector_detect()
1779 if (tc->panel_bridge) in tc_connector_detect()
1797 struct tc_data *tc = bridge_to_tc(bridge); in tc_dpi_bridge_attach() local
1799 if (!tc->panel_bridge) in tc_dpi_bridge_attach()
1802 return drm_bridge_attach(tc->bridge.encoder, tc->panel_bridge, in tc_dpi_bridge_attach()
1803 &tc->bridge, flags); in tc_dpi_bridge_attach()
1810 struct tc_data *tc = bridge_to_tc(bridge); in tc_edp_bridge_attach() local
1814 if (tc->panel_bridge) { in tc_edp_bridge_attach()
1816 ret = drm_bridge_attach(tc->bridge.encoder, tc->panel_bridge, in tc_edp_bridge_attach()
1817 &tc->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in tc_edp_bridge_attach()
1825 tc->aux.drm_dev = drm; in tc_edp_bridge_attach()
1826 ret = drm_dp_aux_register(&tc->aux); in tc_edp_bridge_attach()
1831 drm_connector_helper_add(&tc->connector, &tc_connector_helper_funcs); in tc_edp_bridge_attach()
1832 ret = drm_connector_init(drm, &tc->connector, &tc_connector_funcs, tc->bridge.type); in tc_edp_bridge_attach()
1837 if (tc->hpd_pin >= 0) { in tc_edp_bridge_attach()
1838 if (tc->have_irq) in tc_edp_bridge_attach()
1839 tc->connector.polled = DRM_CONNECTOR_POLL_HPD; in tc_edp_bridge_attach()
1841 tc->connector.polled = DRM_CONNECTOR_POLL_CONNECT | in tc_edp_bridge_attach()
1845 drm_display_info_set_bus_formats(&tc->connector.display_info, in tc_edp_bridge_attach()
1847 tc->connector.display_info.bus_flags = in tc_edp_bridge_attach()
1851 drm_connector_attach_encoder(&tc->connector, tc->bridge.encoder); in tc_edp_bridge_attach()
1855 drm_dp_aux_unregister(&tc->aux); in tc_edp_bridge_attach()
2203 struct tc_data *tc = arg; in tc_irq_handler() local
2207 r = regmap_read(tc->regmap, INTSTS_G, &val); in tc_irq_handler()
2217 regmap_read(tc->regmap, SYSSTAT, &stat); in tc_irq_handler()
2219 dev_err(tc->dev, "syserr %x\n", stat); in tc_irq_handler()
2222 if (tc->hpd_pin >= 0 && tc->bridge.dev && tc->aux.drm_dev) { in tc_irq_handler()
2229 bool h = val & INT_GPIO_H(tc->hpd_pin); in tc_irq_handler()
2230 bool lc = val & INT_GPIO_LC(tc->hpd_pin); in tc_irq_handler()
2232 dev_dbg(tc->dev, "GPIO%d: %s %s\n", tc->hpd_pin, in tc_irq_handler()
2236 drm_kms_helper_hotplug_event(tc->bridge.dev); in tc_irq_handler()
2239 regmap_write(tc->regmap, INTSTS_G, val); in tc_irq_handler()
2244 static int tc_mipi_dsi_host_attach(struct tc_data *tc) in tc_mipi_dsi_host_attach() argument
2246 struct device *dev = tc->dev; in tc_mipi_dsi_host_attach()
2276 tc->dsi = dsi; in tc_mipi_dsi_host_attach()
2291 static int tc_probe_dpi_bridge_endpoint(struct tc_data *tc) in tc_probe_dpi_bridge_endpoint() argument
2293 struct device *dev = tc->dev; in tc_probe_dpi_bridge_endpoint()
2310 tc->panel_bridge = bridge; in tc_probe_dpi_bridge_endpoint()
2311 tc->bridge.type = DRM_MODE_CONNECTOR_DPI; in tc_probe_dpi_bridge_endpoint()
2312 tc->bridge.funcs = &tc_dpi_bridge_funcs; in tc_probe_dpi_bridge_endpoint()
2320 static int tc_probe_edp_bridge_endpoint(struct tc_data *tc) in tc_probe_edp_bridge_endpoint() argument
2322 struct device *dev = tc->dev; in tc_probe_edp_bridge_endpoint()
2338 tc->panel_bridge = panel_bridge; in tc_probe_edp_bridge_endpoint()
2339 tc->bridge.type = DRM_MODE_CONNECTOR_eDP; in tc_probe_edp_bridge_endpoint()
2341 tc->bridge.type = DRM_MODE_CONNECTOR_DisplayPort; in tc_probe_edp_bridge_endpoint()
2344 tc->bridge.funcs = &tc_edp_bridge_funcs; in tc_probe_edp_bridge_endpoint()
2345 if (tc->hpd_pin >= 0) in tc_probe_edp_bridge_endpoint()
2346 tc->bridge.ops |= DRM_BRIDGE_OP_DETECT; in tc_probe_edp_bridge_endpoint()
2347 tc->bridge.ops |= DRM_BRIDGE_OP_EDID; in tc_probe_edp_bridge_endpoint()
2352 static int tc_probe_bridge_endpoint(struct tc_data *tc) in tc_probe_bridge_endpoint() argument
2354 struct device *dev = tc->dev; in tc_probe_bridge_endpoint()
2388 tc->pre_emphasis, in tc_probe_bridge_endpoint()
2389 ARRAY_SIZE(tc->pre_emphasis)); in tc_probe_bridge_endpoint()
2391 if (tc->pre_emphasis[0] < 0 || tc->pre_emphasis[0] > 2 || in tc_probe_bridge_endpoint()
2392 tc->pre_emphasis[1] < 0 || tc->pre_emphasis[1] > 2) { in tc_probe_bridge_endpoint()
2401 tc->input_connector_dsi = false; in tc_probe_bridge_endpoint()
2402 return tc_probe_edp_bridge_endpoint(tc); in tc_probe_bridge_endpoint()
2404 tc->input_connector_dsi = true; in tc_probe_bridge_endpoint()
2405 return tc_probe_dpi_bridge_endpoint(tc); in tc_probe_bridge_endpoint()
2407 tc->input_connector_dsi = true; in tc_probe_bridge_endpoint()
2408 return tc_probe_edp_bridge_endpoint(tc); in tc_probe_bridge_endpoint()
2419 struct tc_data *tc; in tc_probe() local
2422 tc = devm_kzalloc(dev, sizeof(*tc), GFP_KERNEL); in tc_probe()
2423 if (!tc) in tc_probe()
2426 tc->dev = dev; in tc_probe()
2428 ret = tc_probe_bridge_endpoint(tc); in tc_probe()
2432 tc->refclk = devm_clk_get_enabled(dev, "ref"); in tc_probe()
2433 if (IS_ERR(tc->refclk)) in tc_probe()
2434 return dev_err_probe(dev, PTR_ERR(tc->refclk), in tc_probe()
2441 tc->sd_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH); in tc_probe()
2442 if (IS_ERR(tc->sd_gpio)) in tc_probe()
2443 return PTR_ERR(tc->sd_gpio); in tc_probe()
2445 if (tc->sd_gpio) { in tc_probe()
2446 gpiod_set_value_cansleep(tc->sd_gpio, 0); in tc_probe()
2451 tc->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in tc_probe()
2452 if (IS_ERR(tc->reset_gpio)) in tc_probe()
2453 return PTR_ERR(tc->reset_gpio); in tc_probe()
2455 if (tc->reset_gpio) { in tc_probe()
2456 gpiod_set_value_cansleep(tc->reset_gpio, 1); in tc_probe()
2460 tc->regmap = devm_regmap_init_i2c(client, &tc_regmap_config); in tc_probe()
2461 if (IS_ERR(tc->regmap)) { in tc_probe()
2462 ret = PTR_ERR(tc->regmap); in tc_probe()
2468 &tc->hpd_pin); in tc_probe()
2470 tc->hpd_pin = -ENODEV; in tc_probe()
2472 if (tc->hpd_pin < 0 || tc->hpd_pin > 1) { in tc_probe()
2480 regmap_write(tc->regmap, INTCTL_G, INT_SYSERR); in tc_probe()
2485 "tc358767-irq", tc); in tc_probe()
2491 tc->have_irq = true; in tc_probe()
2494 ret = regmap_read(tc->regmap, TC_IDREG, &tc->rev); in tc_probe()
2496 dev_err(tc->dev, "can not read device ID: %d\n", ret); in tc_probe()
2500 if ((tc->rev != 0x6601) && (tc->rev != 0x6603)) { in tc_probe()
2501 dev_err(tc->dev, "invalid device ID: 0x%08x\n", tc->rev); in tc_probe()
2505 tc->assr = (tc->rev == 0x6601); /* Enable ASSR for eDP panels */ in tc_probe()
2507 if (!tc->reset_gpio) { in tc_probe()
2514 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
2517 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
2523 if (tc->hpd_pin >= 0) { in tc_probe()
2524 u32 lcnt_reg = tc->hpd_pin == 0 ? INT_GP0_LCNT : INT_GP1_LCNT; in tc_probe()
2525 u32 h_lc = INT_GPIO_H(tc->hpd_pin) | INT_GPIO_LC(tc->hpd_pin); in tc_probe()
2528 regmap_write(tc->regmap, lcnt_reg, in tc_probe()
2529 clk_get_rate(tc->refclk) * 2 / 1000); in tc_probe()
2531 regmap_write(tc->regmap, GPIOM, BIT(tc->hpd_pin)); in tc_probe()
2533 if (tc->have_irq) { in tc_probe()
2535 regmap_update_bits(tc->regmap, INTCTL_G, h_lc, h_lc); in tc_probe()
2539 if (tc->bridge.type != DRM_MODE_CONNECTOR_DPI) { /* (e)DP output */ in tc_probe()
2540 ret = tc_aux_link_setup(tc); in tc_probe()
2545 tc->bridge.of_node = dev->of_node; in tc_probe()
2546 drm_bridge_add(&tc->bridge); in tc_probe()
2548 i2c_set_clientdata(client, tc); in tc_probe()
2550 if (tc->input_connector_dsi) { /* DSI input */ in tc_probe()
2551 ret = tc_mipi_dsi_host_attach(tc); in tc_probe()
2553 drm_bridge_remove(&tc->bridge); in tc_probe()
2563 struct tc_data *tc = i2c_get_clientdata(client); in tc_remove() local
2565 drm_bridge_remove(&tc->bridge); in tc_remove()