1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/media-bus-format.h>
52 #define DRIVER_NAME			"imx8qxp-pixel-combiner"
78 	return readl(pc->base + offset);  in imx8qxp_pc_read()
84 	writel(value, pc->base + offset);  in imx8qxp_pc_write()
104 	if (mode->hdisplay > 2560)  in imx8qxp_pc_bridge_mode_valid()
113 	struct imx8qxp_pc_channel *ch = bridge->driver_private;  in imx8qxp_pc_bridge_attach()
114 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_attach()
117 		DRM_DEV_ERROR(pc->dev,  in imx8qxp_pc_bridge_attach()
119 		return -EINVAL;  in imx8qxp_pc_bridge_attach()
122 	return drm_bridge_attach(bridge->encoder,  in imx8qxp_pc_bridge_attach()
123 				 ch->next_bridge, bridge,  in imx8qxp_pc_bridge_attach()
132 	struct imx8qxp_pc_channel *ch = bridge->driver_private;  in imx8qxp_pc_bridge_mode_set()
133 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_mode_set()
137 	ret = pm_runtime_get_sync(pc->dev);  in imx8qxp_pc_bridge_mode_set()
139 		DRM_DEV_ERROR(pc->dev,  in imx8qxp_pc_bridge_mode_set()
142 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_bridge_mode_set()
144 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_bridge_mode_set()
147 	/* HSYNC to pixel link is active low. */  in imx8qxp_pc_bridge_mode_set()
149 			     PC_DISP_HSYNC_POLARITY(ch->stream_id));  in imx8qxp_pc_bridge_mode_set()
151 	/* VSYNC to pixel link is active low. */  in imx8qxp_pc_bridge_mode_set()
153 			     PC_DISP_VSYNC_POLARITY(ch->stream_id));  in imx8qxp_pc_bridge_mode_set()
155 	/* Data enable to pixel link is active high. */  in imx8qxp_pc_bridge_mode_set()
157 			     PC_DISP_DVALID_POLARITY(ch->stream_id));  in imx8qxp_pc_bridge_mode_set()
164 	if (ch->stream_id == 0) {  in imx8qxp_pc_bridge_mode_set()
174 	imx8qxp_pc_write_set(pc, PC_CTRL_REG, PC_DISP_BYPASS(ch->stream_id));  in imx8qxp_pc_bridge_mode_set()
176 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_bridge_mode_set()
183 	struct imx8qxp_pc_channel *ch = bridge->driver_private;  in imx8qxp_pc_bridge_atomic_disable()
184 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_atomic_disable()
187 	ret = pm_runtime_put(pc->dev);  in imx8qxp_pc_bridge_atomic_disable()
189 		DRM_DEV_ERROR(pc->dev, "failed to put runtime PM: %d\n", ret);  in imx8qxp_pc_bridge_atomic_disable()
274 	struct device *dev = &pdev->dev;  in imx8qxp_pc_bridge_probe()
275 	struct device_node *np = dev->of_node;  in imx8qxp_pc_bridge_probe()
282 		return -ENOMEM;  in imx8qxp_pc_bridge_probe()
284 	pc->base = devm_platform_ioremap_resource(pdev, 0);  in imx8qxp_pc_bridge_probe()
285 	if (IS_ERR(pc->base))  in imx8qxp_pc_bridge_probe()
286 		return PTR_ERR(pc->base);  in imx8qxp_pc_bridge_probe()
288 	pc->dev = dev;  in imx8qxp_pc_bridge_probe()
290 	pc->clk_apb = devm_clk_get(dev, "apb");  in imx8qxp_pc_bridge_probe()
291 	if (IS_ERR(pc->clk_apb)) {  in imx8qxp_pc_bridge_probe()
292 		ret = PTR_ERR(pc->clk_apb);  in imx8qxp_pc_bridge_probe()
293 		if (ret != -EPROBE_DEFER)  in imx8qxp_pc_bridge_probe()
304 			ret = -EINVAL;  in imx8qxp_pc_bridge_probe()
310 		ch = &pc->ch[i];  in imx8qxp_pc_bridge_probe()
311 		ch->pc = pc;  in imx8qxp_pc_bridge_probe()
312 		ch->stream_id = i;  in imx8qxp_pc_bridge_probe()
316 			ret = -ENODEV;  in imx8qxp_pc_bridge_probe()
323 		ch->next_bridge = of_drm_find_bridge(remote);  in imx8qxp_pc_bridge_probe()
324 		if (!ch->next_bridge) {  in imx8qxp_pc_bridge_probe()
326 			ret = -EPROBE_DEFER;  in imx8qxp_pc_bridge_probe()
335 		ch->bridge.driver_private = ch;  in imx8qxp_pc_bridge_probe()
336 		ch->bridge.funcs = &imx8qxp_pc_bridge_funcs;  in imx8qxp_pc_bridge_probe()
337 		ch->bridge.of_node = child;  in imx8qxp_pc_bridge_probe()
338 		ch->is_available = true;  in imx8qxp_pc_bridge_probe()
340 		drm_bridge_add(&ch->bridge);  in imx8qxp_pc_bridge_probe()
348 	if (i == 1 && pc->ch[0].next_bridge)  in imx8qxp_pc_bridge_probe()
349 		drm_bridge_remove(&pc->ch[0].bridge);  in imx8qxp_pc_bridge_probe()
362 		ch = &pc->ch[i];  in imx8qxp_pc_bridge_remove()
364 		if (!ch->is_available)  in imx8qxp_pc_bridge_remove()
367 		drm_bridge_remove(&ch->bridge);  in imx8qxp_pc_bridge_remove()
368 		ch->is_available = false;  in imx8qxp_pc_bridge_remove()
371 	pm_runtime_disable(&pdev->dev);  in imx8qxp_pc_bridge_remove()
380 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_runtime_suspend()
382 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_runtime_suspend()
385 	/* Disable pixel combiner by full reset. */  in imx8qxp_pc_runtime_suspend()
388 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_runtime_suspend()
402 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_runtime_resume()
404 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_runtime_resume()
412 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_runtime_resume()
423 	{ .compatible = "fsl,imx8qm-pixel-combiner", },
424 	{ .compatible = "fsl,imx8qxp-pixel-combiner", },
440 MODULE_DESCRIPTION("i.MX8QM/QXP pixel combiner bridge driver");