Lines Matching full:reg
28 u32 reg; in analogix_dp_enable_video_mute() local
31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
32 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg &= ~HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
43 u32 reg; in analogix_dp_stop_video() local
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
46 reg &= ~VIDEO_EN; in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
52 u32 reg; in analogix_dp_lane_swap() local
55 reg = LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 | in analogix_dp_lane_swap()
58 reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 | in analogix_dp_lane_swap()
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
66 u32 reg; in analogix_dp_init_analog_param() local
68 reg = TX_TERMINAL_CTRL_50_OHM; in analogix_dp_init_analog_param()
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
71 reg = SEL_24M | TX_DVDD_BIT_1_0625V; in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
75 reg = REF_CLK_24M; in analogix_dp_init_analog_param()
77 reg ^= REF_CLK_MASK; in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
86 reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO; in analogix_dp_init_analog_param()
87 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); in analogix_dp_init_analog_param()
89 reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM | in analogix_dp_init_analog_param()
91 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1); in analogix_dp_init_analog_param()
93 reg = CH3_AMP_400_MV | CH2_AMP_400_MV | in analogix_dp_init_analog_param()
95 writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL); in analogix_dp_init_analog_param()
120 u32 reg; in analogix_dp_reset() local
126 reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N | in analogix_dp_reset()
129 reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N | in analogix_dp_reset()
133 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_reset()
135 reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N | in analogix_dp_reset()
138 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset()
175 u32 reg; in analogix_dp_config_interrupt() local
178 reg = COMMON_INT_MASK_1; in analogix_dp_config_interrupt()
179 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_config_interrupt()
181 reg = COMMON_INT_MASK_2; in analogix_dp_config_interrupt()
182 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_config_interrupt()
184 reg = COMMON_INT_MASK_3; in analogix_dp_config_interrupt()
185 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_config_interrupt()
187 reg = COMMON_INT_MASK_4; in analogix_dp_config_interrupt()
188 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_config_interrupt()
190 reg = INT_STA_MASK; in analogix_dp_config_interrupt()
191 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_config_interrupt()
196 u32 reg; in analogix_dp_mute_hpd_interrupt() local
199 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
200 reg &= ~COMMON_INT_MASK_4; in analogix_dp_mute_hpd_interrupt()
201 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
203 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
204 reg &= ~INT_STA_MASK; in analogix_dp_mute_hpd_interrupt()
205 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
210 u32 reg; in analogix_dp_unmute_hpd_interrupt() local
213 reg = COMMON_INT_MASK_4; in analogix_dp_unmute_hpd_interrupt()
214 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_unmute_hpd_interrupt()
216 reg = INT_STA_MASK; in analogix_dp_unmute_hpd_interrupt()
217 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_unmute_hpd_interrupt()
231 u32 reg; in analogix_dp_set_pll_power_down() local
240 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
242 reg |= mask; in analogix_dp_set_pll_power_down()
244 reg &= ~mask; in analogix_dp_set_pll_power_down()
245 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
252 u32 reg; in analogix_dp_set_analog_power_down() local
266 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
268 reg |= mask; in analogix_dp_set_analog_power_down()
270 reg &= ~mask; in analogix_dp_set_analog_power_down()
271 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
275 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
278 reg |= mask; in analogix_dp_set_analog_power_down()
280 reg &= ~mask; in analogix_dp_set_analog_power_down()
281 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
285 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
288 reg |= mask; in analogix_dp_set_analog_power_down()
290 reg &= ~mask; in analogix_dp_set_analog_power_down()
291 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
295 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
298 reg |= mask; in analogix_dp_set_analog_power_down()
300 reg &= ~mask; in analogix_dp_set_analog_power_down()
301 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
305 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
308 reg |= mask; in analogix_dp_set_analog_power_down()
310 reg &= ~mask; in analogix_dp_set_analog_power_down()
311 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
324 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
326 reg |= mask; in analogix_dp_set_analog_power_down()
328 reg &= ~mask; in analogix_dp_set_analog_power_down()
330 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
336 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
337 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
339 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
340 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
342 reg &= ~DP_INC_BG; in analogix_dp_set_analog_power_down()
343 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
356 u32 reg; in analogix_dp_init_analog_func() local
360 reg = PLL_LOCK_CHG; in analogix_dp_init_analog_func()
361 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_analog_func()
363 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
364 reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL); in analogix_dp_init_analog_func()
365 writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
371 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
372 reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N in analogix_dp_init_analog_func()
374 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
380 u32 reg; in analogix_dp_clear_hotplug_interrupts() local
385 reg = HOTPLUG_CHG | HPD_LOST | PLUG; in analogix_dp_clear_hotplug_interrupts()
386 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_clear_hotplug_interrupts()
388 reg = INT_HPD; in analogix_dp_clear_hotplug_interrupts()
389 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_clear_hotplug_interrupts()
394 u32 reg; in analogix_dp_init_hpd() local
401 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
402 reg &= ~(F_HPD | HPD_CTRL); in analogix_dp_init_hpd()
403 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
408 u32 reg; in analogix_dp_force_hpd() local
410 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
411 reg = (F_HPD | HPD_CTRL); in analogix_dp_force_hpd()
412 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
417 u32 reg; in analogix_dp_get_irq_type() local
420 reg = gpiod_get_value(dp->hpd_gpiod); in analogix_dp_get_irq_type()
421 if (reg) in analogix_dp_get_irq_type()
427 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_get_irq_type()
429 if (reg & PLUG) in analogix_dp_get_irq_type()
432 if (reg & HPD_LOST) in analogix_dp_get_irq_type()
435 if (reg & HOTPLUG_CHG) in analogix_dp_get_irq_type()
444 u32 reg; in analogix_dp_reset_aux() local
447 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
448 reg |= AUX_FUNC_EN_N; in analogix_dp_reset_aux()
449 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
454 u32 reg; in analogix_dp_init_aux() local
457 reg = RPLY_RECEIV | AUX_ERR; in analogix_dp_init_aux()
458 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_aux()
468 reg = 0; in analogix_dp_init_aux()
470 reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3); in analogix_dp_init_aux()
473 reg |= AUX_HW_RETRY_COUNT_SEL(0) | in analogix_dp_init_aux()
476 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); in analogix_dp_init_aux()
479 reg = DEFER_CTRL_EN | DEFER_COUNT(1); in analogix_dp_init_aux()
480 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL); in analogix_dp_init_aux()
483 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
484 reg &= ~AUX_FUNC_EN_N; in analogix_dp_init_aux()
485 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
490 u32 reg; in analogix_dp_get_plug_in_status() local
496 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_get_plug_in_status()
497 if (reg & HPD_STATUS) in analogix_dp_get_plug_in_status()
506 u32 reg; in analogix_dp_enable_sw_function() local
508 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
509 reg &= ~SW_FUNC_EN_N; in analogix_dp_enable_sw_function()
510 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
515 u32 reg; in analogix_dp_set_link_bandwidth() local
517 reg = bwtype; in analogix_dp_set_link_bandwidth()
519 writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_set_link_bandwidth()
524 u32 reg; in analogix_dp_get_link_bandwidth() local
526 reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_get_link_bandwidth()
527 *bwtype = reg; in analogix_dp_get_link_bandwidth()
532 u32 reg; in analogix_dp_set_lane_count() local
534 reg = count; in analogix_dp_set_lane_count()
535 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_set_lane_count()
540 u32 reg; in analogix_dp_get_lane_count() local
542 reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_get_lane_count()
543 *count = reg; in analogix_dp_get_lane_count()
563 u32 reg; in analogix_dp_enable_enhanced_mode() local
566 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
567 reg |= ENHANCED; in analogix_dp_enable_enhanced_mode()
568 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
570 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
571 reg &= ~ENHANCED; in analogix_dp_enable_enhanced_mode()
572 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
579 u32 reg; in analogix_dp_set_training_pattern() local
583 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7; in analogix_dp_set_training_pattern()
584 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
587 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2; in analogix_dp_set_training_pattern()
588 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
591 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in analogix_dp_set_training_pattern()
592 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
595 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2; in analogix_dp_set_training_pattern()
596 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
599 reg = SCRAMBLING_ENABLE | in analogix_dp_set_training_pattern()
602 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
611 u32 reg; in analogix_dp_reset_macro() local
613 reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
614 reg |= MACRO_RST; in analogix_dp_reset_macro()
615 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
620 reg &= ~MACRO_RST; in analogix_dp_reset_macro()
621 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
626 u32 reg; in analogix_dp_init_video() local
628 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in analogix_dp_init_video()
629 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_video()
631 reg = 0x0; in analogix_dp_init_video()
632 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
634 reg = CHA_CRI(4) | CHA_CTRL; in analogix_dp_init_video()
635 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_init_video()
637 reg = 0x0; in analogix_dp_init_video()
638 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_video()
640 reg = VID_HRES_TH(2) | VID_VRES_TH(0); in analogix_dp_init_video()
641 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8); in analogix_dp_init_video()
646 u32 reg; in analogix_dp_set_video_color_format() local
649 reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) | in analogix_dp_set_video_color_format()
652 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2); in analogix_dp_set_video_color_format()
655 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
656 reg &= ~IN_YC_COEFFI_MASK; in analogix_dp_set_video_color_format()
658 reg |= IN_YC_COEFFI_ITU709; in analogix_dp_set_video_color_format()
660 reg |= IN_YC_COEFFI_ITU601; in analogix_dp_set_video_color_format()
661 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
666 u32 reg; in analogix_dp_is_slave_video_stream_clock_on() local
668 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
669 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
671 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
673 if (!(reg & DET_STA)) { in analogix_dp_is_slave_video_stream_clock_on()
678 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
679 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
681 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
684 if (reg & CHA_STA) { in analogix_dp_is_slave_video_stream_clock_on()
696 u32 reg; in analogix_dp_set_video_cr_mn() local
699 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
700 reg |= FIX_M_VID; in analogix_dp_set_video_cr_mn()
701 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
702 reg = m_value & 0xff; in analogix_dp_set_video_cr_mn()
703 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0); in analogix_dp_set_video_cr_mn()
704 reg = (m_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
705 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1); in analogix_dp_set_video_cr_mn()
706 reg = (m_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
707 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2); in analogix_dp_set_video_cr_mn()
709 reg = n_value & 0xff; in analogix_dp_set_video_cr_mn()
710 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
711 reg = (n_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
712 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
713 reg = (n_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
714 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
716 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
717 reg &= ~FIX_M_VID; in analogix_dp_set_video_cr_mn()
718 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
728 u32 reg; in analogix_dp_set_video_timing_mode() local
731 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
732 reg &= ~FORMAT_SEL; in analogix_dp_set_video_timing_mode()
733 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
735 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
736 reg |= FORMAT_SEL; in analogix_dp_set_video_timing_mode()
737 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
743 u32 reg; in analogix_dp_enable_video_master() local
746 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
747 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
748 reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE; in analogix_dp_enable_video_master()
749 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
751 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
752 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
753 reg |= VIDEO_MODE_SLAVE_MODE; in analogix_dp_enable_video_master()
754 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
760 u32 reg; in analogix_dp_start_video() local
762 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
763 reg |= VIDEO_EN; in analogix_dp_start_video()
764 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
769 u32 reg; in analogix_dp_is_video_stream_on() local
771 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
772 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
774 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
775 if (!(reg & STRM_VALID)) { in analogix_dp_is_video_stream_on()
785 u32 reg; in analogix_dp_config_video_slave_mode() local
787 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
789 reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
791 reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
792 reg |= MASTER_VID_FUNC_EN_N; in analogix_dp_config_video_slave_mode()
794 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
796 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
797 reg &= ~INTERACE_SCAN_CFG; in analogix_dp_config_video_slave_mode()
798 reg |= (dp->video_info.interlaced << 2); in analogix_dp_config_video_slave_mode()
799 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
801 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
802 reg &= ~VSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
803 reg |= (dp->video_info.v_sync_polarity << 1); in analogix_dp_config_video_slave_mode()
804 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
806 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
807 reg &= ~HSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
808 reg |= (dp->video_info.h_sync_polarity << 0); in analogix_dp_config_video_slave_mode()
809 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
811 reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE; in analogix_dp_config_video_slave_mode()
812 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_config_video_slave_mode()
817 u32 reg; in analogix_dp_enable_scrambling() local
819 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
820 reg &= ~SCRAMBLING_DISABLE; in analogix_dp_enable_scrambling()
821 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
826 u32 reg; in analogix_dp_disable_scrambling() local
828 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
829 reg |= SCRAMBLING_DISABLE; in analogix_dp_disable_scrambling()
830 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
926 u32 reg; in analogix_dp_transfer() local
936 reg = BUF_CLR; in analogix_dp_transfer()
937 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_transfer()
941 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
943 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
947 reg = AUX_TX_COMM_READ | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
949 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
953 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
957 reg = AUX_TX_COMM_READ | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
964 reg |= AUX_LENGTH(msg->size); in analogix_dp_transfer()
965 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_transfer()
968 reg = AUX_ADDR_7_0(msg->address); in analogix_dp_transfer()
969 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_transfer()
970 reg = AUX_ADDR_15_8(msg->address); in analogix_dp_transfer()
971 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_transfer()
972 reg = AUX_ADDR_19_16(msg->address); in analogix_dp_transfer()
973 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_transfer()
977 reg = buffer[i]; in analogix_dp_transfer()
978 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
984 reg = AUX_EN; in analogix_dp_transfer()
988 reg |= ADDR_ONLY; in analogix_dp_transfer()
990 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_transfer()
993 reg, !(reg & AUX_EN), 25, 500 * 1000); in analogix_dp_transfer()
1002 reg, reg & RPLY_RECEIV, 10, 20 * 1000); in analogix_dp_transfer()
1012 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1013 if ((reg & AUX_ERR)) { in analogix_dp_transfer()
1023 aux_status, !!(reg & AUX_ERR)); in analogix_dp_transfer()
1029 reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1031 buffer[i] = (unsigned char)reg; in analogix_dp_transfer()
1036 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); in analogix_dp_transfer()
1037 if (reg == AUX_RX_COMM_AUX_DEFER) in analogix_dp_transfer()
1039 else if (reg == AUX_RX_COMM_I2C_DEFER) in analogix_dp_transfer()