35 #define I2C_IDX_RX_P0		3  macro
44 	[I2C_IDX_RX_P0] = 0x7e,
52 	[I2C_IDX_RX_P0] = 0x7e,
119 	err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_set_hpd()
141 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_clear_hpd()
163 	err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,  in anx78xx_rx_initialization()
168 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_CHIP_CTRL_REG,  in anx78xx_rx_initialization()
174 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
180 	err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
187 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
193 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
199 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_AUDVID_CTRL_REG,  in anx78xx_rx_initialization()
204 	err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
209 	err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
221 	err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_rx_initialization()
305 	err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_xtal_clk_sel()
311 	err = regmap_write(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_xtal_clk_sel()
459 	err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_MASK1_REG,  in anx78xx_enable_interrupts()
609 	err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,  in anx78xx_dp_link_training()
1107 	err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,  in anx78xx_handle_hdmi_int_1()
1117 		err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],  in anx78xx_handle_hdmi_int_1()
1174 	err = regmap_read(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,  in anx78xx_intp_threaded_handler()