43 static void malidp_write_gamma_table(struct malidp_hw_device *hwdev,  in malidp_write_gamma_table()  argument
54 	malidp_hw_write(hwdev, gamma_write_mask,  in malidp_write_gamma_table()
55 			hwdev->hw->map.coeffs_base + MALIDP_COEF_TABLE_ADDR);  in malidp_write_gamma_table()
57 		malidp_hw_write(hwdev, data[i],  in malidp_write_gamma_table()
58 				hwdev->hw->map.coeffs_base +  in malidp_write_gamma_table()
66 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_update_gamma()  local
72 		malidp_hw_clearbits(hwdev,  in malidp_atomic_commit_update_gamma()
81 			malidp_write_gamma_table(hwdev, mc->gamma_coeffs);  in malidp_atomic_commit_update_gamma()
83 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_GAMMA,  in malidp_atomic_commit_update_gamma()
93 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_update_coloradj()  local
100 		malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_CADJ,  in malidp_atomic_commit_update_coloradj()
109 				malidp_hw_write(hwdev,  in malidp_atomic_commit_update_coloradj()
111 						hwdev->hw->map.coeffs_base +  in malidp_atomic_commit_update_coloradj()
114 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_CADJ,  in malidp_atomic_commit_update_coloradj()
125 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_se_config()  local
128 	u32 se_control = hwdev->hw->map.se_base +  in malidp_atomic_commit_se_config()
129 			 ((hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) ?  in malidp_atomic_commit_se_config()
137 		val = malidp_hw_read(hwdev, se_control);  in malidp_atomic_commit_se_config()
139 		malidp_hw_write(hwdev, val, se_control);  in malidp_atomic_commit_se_config()
143 	hwdev->hw->se_set_scaling_coeffs(hwdev, s, old_s);  in malidp_atomic_commit_se_config()
144 	val = malidp_hw_read(hwdev, se_control);  in malidp_atomic_commit_se_config()
151 	malidp_hw_write(hwdev, val, se_control);  in malidp_atomic_commit_se_config()
156 	malidp_hw_write(hwdev, val, layer_control + MALIDP_SE_L0_IN_SIZE);  in malidp_atomic_commit_se_config()
159 	malidp_hw_write(hwdev, val, layer_control + MALIDP_SE_L0_OUT_SIZE);  in malidp_atomic_commit_se_config()
162 	malidp_hw_write(hwdev, s->h_init_phase, scr + MALIDP_SE_H_INIT_PH);  in malidp_atomic_commit_se_config()
163 	malidp_hw_write(hwdev, s->h_delta_phase, scr + MALIDP_SE_H_DELTA_PH);  in malidp_atomic_commit_se_config()
164 	malidp_hw_write(hwdev, s->v_init_phase, scr + MALIDP_SE_V_INIT_PH);  in malidp_atomic_commit_se_config()
165 	malidp_hw_write(hwdev, s->v_delta_phase, scr + MALIDP_SE_V_DELTA_PH);  in malidp_atomic_commit_se_config()
174 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_set_and_wait_config_valid()  local
177 	hwdev->hw->set_config_valid(hwdev, 1);  in malidp_set_and_wait_config_valid()
179 	if (hwdev->hw->in_config_mode(hwdev)) {  in malidp_set_and_wait_config_valid()
398 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_init()  local
404 	drm->mode_config.min_width = hwdev->min_line_size;  in malidp_init()
405 	drm->mode_config.min_height = hwdev->min_line_size;  in malidp_init()
406 	drm->mode_config.max_width = hwdev->max_line_size;  in malidp_init()
407 	drm->mode_config.max_height = hwdev->max_line_size;  in malidp_init()
428 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_irq_init()  local
448 		malidp_de_irq_fini(hwdev);  in malidp_irq_init()
593 static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev,  in malidp_is_compatible_hw_id()  argument
606 	core_id = malidp_hw_read(hwdev, MALIDP500_DC_BASE + MALIDP_DE_CORE_ID);  in malidp_is_compatible_hw_id()
619 		core_id = malidp_hw_read(hwdev,  in malidp_is_compatible_hw_id()
670 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_runtime_pm_suspend()  local
673 	WARN_ON(!hwdev->hw->in_config_mode(hwdev));  in malidp_runtime_pm_suspend()
675 	malidp_se_irq_fini(hwdev);  in malidp_runtime_pm_suspend()
676 	malidp_de_irq_fini(hwdev);  in malidp_runtime_pm_suspend()
677 	hwdev->pm_suspended = true;  in malidp_runtime_pm_suspend()
678 	clk_disable_unprepare(hwdev->mclk);  in malidp_runtime_pm_suspend()
679 	clk_disable_unprepare(hwdev->aclk);  in malidp_runtime_pm_suspend()
680 	clk_disable_unprepare(hwdev->pclk);  in malidp_runtime_pm_suspend()
689 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_runtime_pm_resume()  local
691 	clk_prepare_enable(hwdev->pclk);  in malidp_runtime_pm_resume()
692 	clk_prepare_enable(hwdev->aclk);  in malidp_runtime_pm_resume()
693 	clk_prepare_enable(hwdev->mclk);  in malidp_runtime_pm_resume()
694 	hwdev->pm_suspended = false;  in malidp_runtime_pm_resume()
695 	malidp_de_irq_hw_init(hwdev);  in malidp_runtime_pm_resume()
696 	malidp_se_irq_hw_init(hwdev);  in malidp_runtime_pm_resume()
706 	struct malidp_hw_device *hwdev;  in malidp_bind()  local
721 	hwdev = drmm_kzalloc(drm, sizeof(*hwdev), GFP_KERNEL);  in malidp_bind()
722 	if (!hwdev)  in malidp_bind()
725 	hwdev->hw = (struct malidp_hw *)of_device_get_match_data(dev);  in malidp_bind()
726 	malidp->dev = hwdev;  in malidp_bind()
728 	hwdev->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in malidp_bind()
729 	if (IS_ERR(hwdev->regs))  in malidp_bind()
730 		return PTR_ERR(hwdev->regs);  in malidp_bind()
732 	hwdev->pclk = devm_clk_get(dev, "pclk");  in malidp_bind()
733 	if (IS_ERR(hwdev->pclk))  in malidp_bind()
734 		return PTR_ERR(hwdev->pclk);  in malidp_bind()
736 	hwdev->aclk = devm_clk_get(dev, "aclk");  in malidp_bind()
737 	if (IS_ERR(hwdev->aclk))  in malidp_bind()
738 		return PTR_ERR(hwdev->aclk);  in malidp_bind()
740 	hwdev->mclk = devm_clk_get(dev, "mclk");  in malidp_bind()
741 	if (IS_ERR(hwdev->mclk))  in malidp_bind()
742 		return PTR_ERR(hwdev->mclk);  in malidp_bind()
744 	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");  in malidp_bind()
745 	if (IS_ERR(hwdev->pxlclk))  in malidp_bind()
746 		return PTR_ERR(hwdev->pxlclk);  in malidp_bind()
776 	if (!malidp_is_compatible_hw_id(hwdev, dev_id)) {  in malidp_bind()
781 	ret = hwdev->hw->query_hw(hwdev);  in malidp_bind()
787 	version = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_DE_CORE_ID);  in malidp_bind()
795 					&hwdev->arqos_value);  in malidp_bind()
797 		hwdev->arqos_value = 0x0;  in malidp_bind()
808 	malidp_hw_write(hwdev, out_depth, hwdev->hw->map.out_depth_base);  in malidp_bind()
809 	hwdev->output_color_depth = out_depth;  in malidp_bind()
863 	malidp_se_irq_fini(hwdev);  in malidp_bind()
864 	malidp_de_irq_fini(hwdev);  in malidp_bind()
887 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_unbind()  local
893 	malidp_se_irq_fini(hwdev);  in malidp_unbind()
894 	malidp_de_irq_fini(hwdev);  in malidp_unbind()