display/komeda/komeda_dev.h

1 /* SPDX-License-Identifier: GPL-2.0 */
87  * Supplied by chip level and returned by the chip entry function xxx_identify,
93 	 * initialize &komeda_dev->format_table, this function should be called
100 	 * for CHIP to report or add pipeline and component resources to CORE
103 	/** @cleanup: call to chip to cleanup komeda_dev->chip data */
112 	 * for CORE to get the HW event from the CHIP when interrupt happened.
139  * passed to CHIP by &komeda_dev_funcs->change_opmode(), then CHIP can do the
141  * -   KOMEDA_MODE_DISP0: Only one display enabled, pipeline-0 work as master.
142  * -   KOMEDA_MODE_DISP1: Only one display enabled, pipeline-0 work as master.
143  * -   KOMEDA_MODE_DUAL_DISP: Dual display mode, both display has been enabled.
144  * And D71 supports assign two pipelines to one single display on mode
159  * control-abilites of device.
167 	/** @chip: the basic chip information */
168 	struct komeda_chip_info chip;  member
169 	/** @fmt_tbl: initialized by &komeda_dev_funcs->init_format_table */
187 	/** @funcs: chip funcs to access to HW */
192 	 * chip data will be added by &komeda_dev_funcs.enum_resources() and
209 	/* Print a single line per error per frame with error events. */
211 	/* Print a single line per warning per frame with error events. */
213 	/* Print a single line per info event per frame with error events. */
224 	return MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id) == target;  in komeda_product_match()
228 (*komeda_identify_func)(u32 __iomem *reg, struct komeda_chip_info *chip);
231 d71_identify(u32 __iomem *reg, struct komeda_chip_info *chip);