Lines Matching refs:pptable
1224 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_is_support_fine_grained_dpm() local
1234 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
1269 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_emit_clk_levels() local
1354 pptable->LclkFreq[i], in navi10_emit_clk_levels()
1478 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_print_clk_levels() local
1556 pptable->LclkFreq[i], in navi10_print_clk_levels()
1909 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_fan_parameters() local
1911 smu->fan_max_rpm = pptable->FanMaximumRpm; in navi10_get_fan_parameters()
2197 PPTable_t *pptable = table_context->driver_pptable; in navi10_read_sensor() local
2204 *(uint32_t *)data = pptable->FanMaximumRpm; in navi10_read_sensor()
2301 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_thermal_temperature_range() local
2308 range->max = pptable->TedgeLimit * in navi10_get_thermal_temperature_range()
2310 range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) * in navi10_get_thermal_temperature_range()
2312 range->hotspot_crit_max = pptable->ThotspotLimit * in navi10_get_thermal_temperature_range()
2314 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in navi10_get_thermal_temperature_range()
2316 range->mem_crit_max = pptable->TmemLimit * in navi10_get_thermal_temperature_range()
2318 range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM)* in navi10_get_thermal_temperature_range()
2358 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_power_limit() local
2363 if (!pptable) { in navi10_get_power_limit()
2368 pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0]; in navi10_get_power_limit()
2408 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_update_pcie_parameters() local
2414 dpm_context->dpm_tables.pcie_table.pcie_gen[i] = pptable->PcieGenSpeed[i]; in navi10_update_pcie_parameters()
2415 dpm_context->dpm_tables.pcie_table.pcie_lane[i] = pptable->PcieLaneCount[i]; in navi10_update_pcie_parameters()
2420 ((pptable->PcieGenSpeed[i] <= pcie_gen_cap) ? (pptable->PcieGenSpeed[i] << 8) : in navi10_update_pcie_parameters()
2421 (pcie_gen_cap << 8)) | ((pptable->PcieLaneCount[i] <= pcie_width_cap) ? in navi10_update_pcie_parameters()
2422 pptable->PcieLaneCount[i] : pcie_width_cap); in navi10_update_pcie_parameters()
2431 if (pptable->PcieGenSpeed[i] > pcie_gen_cap) in navi10_update_pcie_parameters()
2433 if (pptable->PcieLaneCount[i] > pcie_width_cap) in navi10_update_pcie_parameters()