724 	struct pp_atomctrl_clock_dividers_ai dividers;  in vegam_calculate_sclk_params()  local
732 	/* get the engine clock dividers for this clock value */  in vegam_calculate_sclk_params()
733 	result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock,  &dividers);  in vegam_calculate_sclk_params()
735 		sclk_setting->Fcw_int = dividers.usSclk_fcw_int;  in vegam_calculate_sclk_params()
736 		sclk_setting->Fcw_frac = dividers.usSclk_fcw_frac;  in vegam_calculate_sclk_params()
737 		sclk_setting->Pcc_fcw_int = dividers.usPcc_fcw_int;  in vegam_calculate_sclk_params()
738 		sclk_setting->PllRange = dividers.ucSclkPllRange;  in vegam_calculate_sclk_params()
740 		sclk_setting->Pcc_up_slew_rate = dividers.usPcc_fcw_slew_frac;  in vegam_calculate_sclk_params()
742 		sclk_setting->SSc_En = dividers.ucSscEnable;  in vegam_calculate_sclk_params()
743 		sclk_setting->Fcw1_int = dividers.usSsc_fcw1_int;  in vegam_calculate_sclk_params()
744 		sclk_setting->Fcw1_frac = dividers.usSsc_fcw1_frac;  in vegam_calculate_sclk_params()
745 		sclk_setting->Sclk_ss_slew_rate = dividers.usSsc_fcw_slew_frac;  in vegam_calculate_sclk_params()
1138 			"Error retrieving Engine Clock dividers from VBIOS.",  in vegam_populate_smc_acpi_level()
1199 	struct pp_atomctrl_clock_dividers_vi dividers;  in vegam_populate_smc_vce_level()  local
1231 				table->VceLevel[count].Frequency, &dividers);  in vegam_populate_smc_vce_level()
1236 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_vce_level()
1312 	struct pp_atomctrl_clock_dividers_vi dividers;  in vegam_populate_smc_uvd_level()  local
1343 				table->UvdLevel[count].VclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1347 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1350 				table->UvdLevel[count].DclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1354 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1930 	pp_atomctrl_clock_dividers_vi dividers;  in vegam_init_smc_table()  local
2105 				smu_data->bif_sclk_table[i], &dividers);  in vegam_init_smc_table()
2112 					PP_HOST_TO_SMC_US((uint16_t)(dividers.pll_post_divider));  in vegam_init_smc_table()
2115 					PP_HOST_TO_SMC_US((uint16_t)(dividers.pll_post_divider));  in vegam_init_smc_table()