895 	struct pp_atomctrl_clock_dividers_ai dividers;  in polaris10_calculate_sclk_params()  local
903 	/* get the engine clock dividers for this clock value */  in polaris10_calculate_sclk_params()
904 	result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock,  &dividers);  in polaris10_calculate_sclk_params()
906 		sclk_setting->Fcw_int = dividers.usSclk_fcw_int;  in polaris10_calculate_sclk_params()
907 		sclk_setting->Fcw_frac = dividers.usSclk_fcw_frac;  in polaris10_calculate_sclk_params()
908 		sclk_setting->Pcc_fcw_int = dividers.usPcc_fcw_int;  in polaris10_calculate_sclk_params()
909 		sclk_setting->PllRange = dividers.ucSclkPllRange;  in polaris10_calculate_sclk_params()
911 		sclk_setting->Pcc_up_slew_rate = dividers.usPcc_fcw_slew_frac;  in polaris10_calculate_sclk_params()
913 		sclk_setting->SSc_En = dividers.ucSscEnable;  in polaris10_calculate_sclk_params()
914 		sclk_setting->Fcw1_int = dividers.usSsc_fcw1_int;  in polaris10_calculate_sclk_params()
915 		sclk_setting->Fcw1_frac = dividers.usSsc_fcw1_frac;  in polaris10_calculate_sclk_params()
916 		sclk_setting->Sclk_ss_slew_rate = dividers.usSsc_fcw_slew_frac;  in polaris10_calculate_sclk_params()
1058 	pp_atomctrl_clock_dividers_vi dividers;  in polaris10_populate_all_graphic_levels()  local
1085 					&dividers);  in polaris10_populate_all_graphic_levels()
1091 					dividers.real_clock < dpm_table->sclk_table.dpm_levels[0].value ?  in polaris10_populate_all_graphic_levels()
1092 					dividers.pll_post_divider - 1 : dividers.pll_post_divider,  in polaris10_populate_all_graphic_levels()
1303 …PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return resu…  in polaris10_populate_smc_acpi_level()
1370 	struct pp_atomctrl_clock_dividers_vi dividers;  in polaris10_populate_smc_vce_level()  local
1402 				table->VceLevel[count].Frequency, &dividers);  in polaris10_populate_smc_vce_level()
1407 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;  in polaris10_populate_smc_vce_level()
1420 	struct pp_atomctrl_clock_dividers_vi dividers;  in polaris10_populate_smc_samu_level()  local
1451 				table->SamuLevel[count].Frequency, &dividers);  in polaris10_populate_smc_samu_level()
1456 		table->SamuLevel[count].Divider = (uint8_t)dividers.pll_post_divider;  in polaris10_populate_smc_samu_level()
1525 	struct pp_atomctrl_clock_dividers_vi dividers;  in polaris10_populate_smc_uvd_level()  local
1556 				table->UvdLevel[count].VclkFrequency, &dividers);  in polaris10_populate_smc_uvd_level()
1560 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;  in polaris10_populate_smc_uvd_level()
1563 				table->UvdLevel[count].DclkFrequency, &dividers);  in polaris10_populate_smc_uvd_level()
1567 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;  in polaris10_populate_smc_uvd_level()
1924 	pp_atomctrl_clock_dividers_vi dividers;  in polaris10_init_smc_table()  local
2094 		result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, smu_data->bif_sclk_table[i], &dividers);  in polaris10_init_smc_table()
2098 			table->Ulv.BifSclkDfs = PP_HOST_TO_SMC_US((USHORT)(dividers.pll_post_divider));  in polaris10_init_smc_table()
2100 			table->LinkLevel[i-1].BifSclkDfs = PP_HOST_TO_SMC_US((USHORT)(dividers.pll_post_divider));  in polaris10_init_smc_table()